M48T212V-85MH1TR(2000) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M48T212V-85MH1TR Datasheet PDF : 23 Pages
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M48T212Y, M48T212V
Figure 9. Alarm Interrupt Reset Waveforms
A0-A3
1h
ADDRESS 0h
Fh
ACTIVE FLAG BIT
IRQ/FT
Table 12. Alarm Repeat Modes
RPT5
RPT4
RPT3
1
1
1
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
RPT2
1
1
0
0
0
0
RPT1
1
0
0
0
0
0
HIGH-Z
AI03021
Alarm Setting
Once per Second
Once per Minute
Once per Hour
Once per Day
Once per Month
Once per Year
If the SRAM includes a second chip enable pin
(E2), this pin should be tied to VOUT.
If data retention lifetime is a critical parameter for
the system, it is important to review the data reten-
tion current specifications for the particular
SRAMs being evaluated. Most SRAMs specify a
data retention current at 3.0V. Manufacturers gen-
erally specify a typical condition for room temper-
ature along with a worst case condition (generally
at elevated temperatures). The system level re-
quirements will determine the choice of which val-
ue to use.
The data retention current value of the SRAMs can
then be added to the IBAT value of the M48T212Y/
V to determine the total current requirements for
data retention. The available battery capacity for
the SNAPHAT of your choice can then be divided
by this current to determine the amount of data re-
tention available (see Table 15).
For a further more detailed review of lifetime calcu-
lations, please see Application Note AN1012.
12/23
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