M48T212V-85MH1TR(2000) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M48T212V-85MH1TR Datasheet PDF : 23 Pages
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M48T212Y, M48T212V
INITIAL POWER-ON DEFAULTS
Upon application of power to the device, the fol-
lowing register bits are set to a ‘0’ state: WDS,
BMB0-BMB4, RB0-RB1, AFE, ABE, W and FT.
(See Table 16)
POWER SUPPLY DECOUPLING
AND UNDERSHOOT PROTECTION
Note: ICC transients, including those produced by
output switching, can produce voltage fluctua-
tions, resulting in spikes on the VCC bus. These
transients can be reduced if capacitors are used to
store energy, which stabilizes the VCC bus. The
energy stored in the bypass capacitors will be re-
leased as low going spikes are generated or ener-
gy will be absorbed when overshoots occur.
A ceramic bypass capacitor value of 0.1µF is rec-
ommended in order to provide the needed filtering.
In addition to transients that are caused by normal
SRAM operation, power cycling can generate neg-
ative voltage spikes on VCC that drive it to values
below VSS by as much as one volt. These negative
spikes can cause data corruption in the SRAM
while in battery backup mode.
To protect from these voltage spikes, ST recom-
mends connecting a schottky diode from VCC to
Figure 13. Supply Voltage Protection
VCC
0.1µF
VCC
DEVICE
VSS
AI02169
VSS (cathode connected to VCC, anode to VSS).
(Schottky diode 1N5817 is recommended for
through hole and MBRS120T3 is recommended
for surface mount).
Table 16. Default Values
Conditi on
W
R
Initial Power-up
(Battery Attach for SNAPHAT) (2)
0
0
Subsequent Power-up / RESET (3)
0
0
Power-down (4)
0
0
Note: 1. WDS, BMB0-BMB4, RB0, RB1.
2. State of other control bits undefined.
3. State of other control bits remains unchanged.
4. Assuming these bits set to ‘1’ prior to power-down.
WATCHDOG
FT
AFE
ABE
Register (1)
0
0
0
0
0
0
0
0
0
1
1
0
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