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CS4334 View Datasheet(PDF) - Cirrus Logic

Part Name
Description
Manufacturer
CS4334 Datasheet PDF : 26 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
CS4334/5/6/7/8/9
LRCK
SCLK
Left Channel
Right Channel
SDATA 1 0
19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
32 clocks
Internal SCLK Mode
Right Justified, 20-Bit Data
INT SCLK = 64 Fs if MCLK/LRCK = 512, 256 or 128
INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192
External SCLK Mode
Right Justified, 20-Bit Data
Data Valid on Rising Edge of SCLK
SCLK Must Have at Least 40 Cycles per LRCK Period
Figure 13. CS4337 Data Format
LRCK
SCLK
Left Channel
Right Channel
SDATA
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
32 clocks
Internal SCLK Mode
Right Justified, 16-Bit Data
INT SCLK = 32 Fs if MCLK/LRCK = 512, 256 or 128
INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192
External SCLK Mode
Right Justified, 16-Bit Data
Data Valid on Rising Edge of SCLK
SCLK Must Have at Least 32 Cycles per LRCK Period
Figure 14. CS4338 Data Format
LRCK
SCLK
Left Channel
Right Channel
SDATA 1 0
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
32 clocks
Internal SCLK Mode
Right Justified, 18-Bit Data
INT SCLK = 64 Fs if MCLK/LRCK = 512, 256 or 128
INT SCLK = 48 Fs if MCLK/LRCK = 384 or 192
External SCLK Mode
Right Justified, 18-Bit Data
Data Valid on Rising Edge of SCLK
SCLK Must Have at Least 36 Cycles per LRCK Period
Figure 15. CS4339 Data Format
DS248PP3
15

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