CS495303 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
Manufacturer
CS495303 Datasheet PDF : 36 Pages
| |||
CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
DAO_LRCLK
DAO_SCLK
tdaosstlr
DAO_LRCLK
tdaosclk
DAO_SCLK
tdaosclk
tdaoslrts
DAOn_DATAn
Note: In these diagrams, Falling edge is the inactive edge of DAO_SCLK
Figure 14. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK)
RY 5.19 Switching Characteristics — SDRAM Interface
Refer to Figure 15 through Figure 18.
A (SD_CLKOUT = SD_CLKIN)
Parameter
IN SD_CLKIN high time
SD_CLKIN low time
SD_CLKOUT rise/fall time
SD_CLKOUT Frequency
IM SD_CLKOUT duty cycle
SD_CLKOUT rising edge to signal valid
Signal hold from SD_CLKOUT rising edge
L SD_CLKOUT rising edge to SD_DQMn valid
SD_DQMn hold from SD_CLKOUT rising edge
SD_DATA valid setup to SD_CLKIN rising edge
E SD_DATA valid hold to SD_CLKIN rising edge
PR SD_CLKOUT rising edge to ADDRn valid
Symbol
tsdclkh
tsdclkl
tsdclkrf
-
tsdcmdv
tsdcmdh
tsddqv
tsddqh
tsddsu
tsddh
tsdav
Min
2.3
2.3
-
45
-
-
1.38
1.3
1.38
-
Typical
Max
-
-
1
150
55
3.8
1.1
-
3.8
-
-
-
-
3.8
-
tdaosdv
Unit
ns
ns
ns
MHz
%
ns
ns
ns
ns
ns
ns
ns
DS705PP6
Copyright 2009 Cirrus Logic
25
Share Link: 