CS98100
Address
108
10C
110
114
120
124
128
12C
134
13C
200
204
208
20C
210
214
218
21C
220-224
300
304
308
30C
310
314
318
31C
328
32C
330
Type
R/W
R/W
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WO
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
28
Function
Register Name
Host
Device_3_Control
Host
Device_4_Control
Host
Write_Data_Port
Host
Read_Data_Port
Host
Host_Start_Address
Host
Dram Start Address
Host
Stream_Transfer_Size
Host
DRAM_Burst_Threshold
General
Ser1_Slave_Address
Host
Host_Master_Control
Dram controller
DRAM_Controller_Priority0
Dram controller
DRAM_Controller_Priority1
Dram controller
DRAM_Controller_Priority2
Dram controller
DRAM_Controller_Priority3
Dram controller
DRAM_Controller_Priority4
Dram controller
DRAM_Controller_Setup
Dram controller
DRAM_Command
Dram controller
DRAM_Controller_Mb_Width
Dram controller
DRAM_Controller_Debug
DMA
DMA_Enable
DMA
DMA_Control
DMA
DMA_Status
DMA
Xfer_Byte_Cnt
DMA
Dram_Byte_Start_Addr
DMA
Sram_Byte_Start_Addr
DMA
Fifo_Start_Rd_Addr
DMA
Fifo_Start_Wr_Addr
DMA
Search_Control
DMA
Search_Status
DMA
Fifo_End_Rd_Addr
Table 13. CS98100 Registers (Continued)