CS98100
6.7 Host Master/ATAPI Interface
This 16-bit parallel host interface allows the
CS98100 to be a host master, controlling other de-
vices that would be used on the same system. The
interface supports a programmable protocols and
speeds, including multiplexed and non-multiplexed
addressing. Slaves with different protocols can be
connected at the same time, controlled by different
chip selects. For example, two chip selects can be
used to control an ATAPI DVD device, while the
other two chip selects can control another ATAPI
or non-ATAPI slave device.
Pin
Signal Name Type
Description
91, 92, 93, 94
H_CS[3:0]
O Host Chip Select[3:0]. The host master can be programmed
to use a different protocol for each of the 4 chip selects
69
H_ALE
O Host address latch enable. Used for modes which multiplex
upper address information onto the data lines
124
H_RD
O Host Read Request.
123
H_WR
O Host Write Request.
158
H_RDY
I
Host Ready. Connect to pull-up or pull-down if host is not
used.
66, 67, 68
H_A[2:0]
O Host Address[2:0].
160, 162, 163, 164,
165, 166, 167, 168,
170, 171, 172, 173,
87, 88, 89, 90
H_D[15:0]
B Host Data Bus[15:0]. These pins can also output Host
Address during the address phase for multiplexed
address/data mode. Tie together to pull-up or pull-down if
host is not used.
Table 22. Host Master Interface Pin Assignments
52