CS98100
6.11 General Purpose Input/Output (GPIO)
The CS98100 provides a number of GPIO pins,
each with individual output three-state controls.
There are eight dedicated GPIO pins, which can
also be used to generate internal interrupts based on
edge or level events on the pins. Two groups of ad-
ditional pins may also be re-defined as GPIOs if not
required for other functions. Each of these addi-
tional pins has its own control register bit to select
either GPIO or normal function for the pin.
Pin
Signal
Name
57, 56, 26, 25,
24, 23, 22, 138
GPIO[7:0]
146, 147,
148, 143, 142,
139, 136, 134,
131, 130, 121,
118, 117, 115,
111, 110, 109,
107, 106, 105
145,
140,
132,
119,
112,
108,
GPIO_2[2
5:24]
GPIO_2[2
3:20]
GPIO_2[1
9:16]
GPIO_2[1
5:12]
GPIO_2[1
1:8]
GPIO_2[7:
4]
GPIO_2[3:
0]
69, 66, 67,
68, 158, 91, 92, 93, GPIO_D[2
94, 123, 124, 160, 6:24]
162, 163, 164, 165, GPIO_D[2
166, 167, 168, 170, 3:20]
171, 172, 173, 87, GPIO_D[1
88, 89, 90
9:16]
GPIO_D[1
5:12]
GPIO_D[1
1:8]
GPIO_D[7:
4]
GPIO_D[3:
0]
Type
B
B
B
Description
8 General purpose I/O on dedicated pins
28 General purpose I/Os, redefined from following pins:
DVDS_VLD, DVDS_SOS, DVDS_DAT, CLK27_O, SDA2, SCL2,
SDA1, SCL1, AIN_LRCK, AIN_DATA,
AUD_DO_3, AUD_DO_2, AUD_DO_1, AUD_BCK, SER_CLK,
SER_DI, SER_DO, SER_RDY, VDAT_7, VDAT_6, VDAT_5,
VDAT_4, VDAT_3, VDAT_2, VDAT_1, VDAT_0
27 General purpose I/Os, redefined from following pins:
H_ALE, H_A_2, H_A_1, H_A_0, H_RDY, H_CS_3,H_CS_2,
H_CS_1, H_CS_0, H_WR, H_RD, H_D_15, H_D_14, H_D_13,
H_D_12, H_D_11, H_D_10, H_D_9, H_D_8, H_D_7, H_D_6,
H_D_5, H_D_4, H_D_3, H_D_2, H_D_1, H_D_0
Table 26. General Purpose I/O Interface Pin Assignments
56