QL5732-33BPS484M View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

Manufacturer

QL5732-33BPS484M

33 MHz/32-bit PCI Master/Target with Embedded Programmable Logic and Dual Port SRAM

QuickLogic Corporation 

QL5732 Enhanced QuickPCI Device Data Sheet Rev. E

484 PBGA Pinout Table

Table 23: 484 PBGA Pinout Table

484

PBGA

Function

484

PBGA

Function

484

PBGA

Function

484

PBGA

Function

484

PBGA

A1

I/O<A>

C17

I/O<G>

F11 VCCIO<H> J5

I/O<A>

L21

A2 PLLRST<3> C18

AD[18]

F12 VCCIO<G> J6

I/O<A>

L22

A3

I/O<A>

C19

AD[23]

F13

AD[12]

J7

I/O<A>

M1

A4

I/O<A>

C20

GNDPLL<0>

F14

VCCIO<PCI

>

J8

VCC

M2

A5

I/O<A>

C21

AD[27]

F15

N/C

J9

GND

M3

A6

I/O<H>

C22

AD[30]

F16 VCCIO<G> J10

VCC

M4

A7

I/O<H>

D1

I/O<A>

F17

N/C

J11

VCC

M5

A8 IOCTRL<H> D2

I/O<A>

F18

GNTN

J12

GND

M6

A9

AD[0]

D3

I/O<A>

F19

REQN

J13

VCC

M7

A10

N/C

D4

I/O<A>

F20 IOCTRL<F> J14

GND

M8

A11

N/C

D5

I/O<A>

F21 I/O<F> J15

VCC

M9

A12

TCK

D6

I/O<H>

F22 IOCTRL<F> J16

AD[29]

M10

A13

AD[10]

D7

I/O<H>

G1

I/O<A> J17

VCCIO<F>

M11

A14

AD[13]

D8

I/O<H>

G2

I/O<A> J18

I/O<F>

M12

A15 SERRN

D9

I/O<H>

G3

I/O<A> J19

I/O<F>

M13

A16 I/O<G> D10

AD[4]

G4

I/O<A> J20

I/O<F>

M14

A17

IRDYN

D11

AD[7]

G5

I/O<A> J21

I/O<F>

M15

A18

AD[17]

D12

AD[8]

G6

I/O<A> J22

I/O<F>

M16

A19

AD[20]

D13

AD[14]

G7

GND

K1

TDI

M17

A20

GND

D14 CBEN[1] G8

I/O<H>

K2

I/O<A>

M18

A21 PLLOUT<3> D15 IOCTRL<G> G9

I/O<H>

K3

I/O<A>

M19

A22

IDSEL

D16 CBEN[2] G10 I/O<H>

K4

I/O<A>

M20

B1

I/O<A>

D17

AD[16]

G11 CBEN[0]

K5

I/O<A>

M21

B2

GND

D18 AD[22] G12

GND

K6

VCCIO<A>

M22

B3 GNDPLL<3> D19 VCCPLL<0> G13 I/O<G>

K7

I/O<A>

N1

B4

GND

D20

AD[26]

G14 I/O<G>

K8

VCC

N2

B5

I/O<A>

D21

AD[31]

G15

PAR

K9

VCC

N3

B6

I/O<H> D22

RSTN

G16

GND

K10

GND

N4

B7

I/O<H>

E1 IOCTRL<A> G17 VCCIO<F> K11

GND

N5

B8 INREF<H> E2

I/O<A>

G18

I/O<F>

K12

GND

N6

B9

I/O<H>

E3

I/O<A>

G19

I/O<F>

K13

GND

N7

B10

AD[3]

E4

I/O<A>

G20

I/O<F>

K14

VCC

N8

B11

AD[6]

E5

I/O<A>

G21 INREF<F> K15

VCC

N9

B12

N/C

E6

I/O<H> G22 I/O<F> K16

I/O<F>

N10

B13

N/C

E7

N/C

H1

I/O<A> K17

I/O<F>

N11

B14

N/C

E8

I/O<H>

H2

I/O<A> K18

I/O<F>

N12

B15 I/O<G>]

E9

I/O<H>

H3

I/O<A> K19

I/O<F>

N13

B16 DEVSELN E10

AD[5]

H4

I/O<A> K20

I/O<F>

N14

B17 FRAMEN E11

VCC

H5 IOCTRL<A> K21

I/O<F>

N15

B18

AD[19]

E12

AD[9]

H6 VCCIO<A> K22

I/O<F>

N16

B19 PLLRST<0> E13

AD[15]

H7

I/O<H>

L1

CLK<4>DEDCLK/

PLLIN<0>

N17

B20 CBEN[3] E14 I/O<G>

H8

GND

L2

CLK<0>

N18

B21

AD[24]

E15 IOCTRL<G> H9

VCC

L3 CLK<2>/PLLIN<2> N19

B22

AD[28]

E16 STOPN H10

VCC

L4

I/O<A>

N20

C1

I/O<A>

E17 INREF<G> H11

VCC

L5

I/O<A>

N21

C2

I/O<A>

E18

I/O<G>

H12

GND

L6

I/O<A>

N22

C3 VCCPLL<3> E19

AD[25]

H13

VCC

L7

GND

P1

C4 PLLOUT<2> E20

I/O<F>

H14

VCC

L8

GND

P2

C5

I/O<A>

E21

I/O<F>

H15

GND

L9

GND

P3

(Sheet 1 of 2)

Function

I/O<F>

I/O<F>

I/O<B>

484

PBGA

P15

P16

P17

I/O<B>

P18

I/O<B>

CLK<3>/PLLIN<1>

I/O<B>

VCCIO<B>

CLK<1>

VCC

VCC

GND

GND

GND

GND

GND

GND

GND

I/O<E>

I/O<E>

I/O<E>

CLK<7>

CLK<5>/PLLIN<3>

TMS

I/O<B>

I/O<B>

I/O<B>

I/O<B>

I/O<B>

I/O<B>

I/O<B>

VCC

VCC

GND

GND

GND

GND

VCC

VCC

I/O<E>

P19

P20

P21

P22

R1

R2

R3

R4

R5

R6

R7

R8

R9

R10

R11

R12

R13

R14

R15

R16

R17

R18

R19

R20

R21

R22

T1

T2

T3

T4

T5

T6

T7

T8

T9

T10

VCCIO<E>

T11

I/O<E>

T12

I/O<E>

T13

I/O<E>

T14

I/O<E>

T15

I/O<E>

T16

I/O<B>

T17

I/O<B>

T18

I/O<B>

T19

Function

VCC

I/O<E>

I/O<E>

I/O<E>

I/O<E>

I/O<E>

I/O<E>

I/O<E>

I/O<B>

INREF<B>

I/O<B>

I/O<B>

I/O<B>

I/O<B>

I/O<B>

GND

VCC

VCC

GND

VCC

VCC

VCC

GND

I/O<D>

VCCIO<E>

I/O<E>

I/O<E>

I/O<E>

I/O<E>

I/O<E>

I/O<B>

I/O<B>

I/O<B>

I/O<B>

I/O<B>

VCCIO<B>

GND

I/O<C>

N/C

TRSTB

GND

N/C

I/O<D>

N/C

I/O<D>

GND

I/O<E>

I/O<E>

I/O<E>

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© 2003 QuickLogic Corporation

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