dsPIC30F3014/4013
REGISTER 20-1: OSCCON: OSCILLATOR CONTROL REGISTER (CONTINUED)
bit 4
Unimplemented: Read as ‘0’
bit 3
CF: Clock Fail Detect bit (Read/Clearable by application)
1 = FSCM has detected clock failure
0 = FSCM has NOT detected clock failure
Reset on POR or BOR
Reset when a valid clock switching sequence is initiated
Set when clock fail detected
bit 2
Unimplemented: Read as ‘0’
bit 1
LPOSCEN: 32 KHz Secondary (LP) Oscillator Enable bit
1 = Secondary oscillator is enabled
0 = Secondary oscillator is disabled
Reset on POR or BOR
bit 0
OSWEN: Oscillator Switch Enable bit
1 = Request oscillator switch to selection specified by NOSC<2:0> bits
0 = Oscillator switch is complete
Reset on POR or BOR
Reset after a successful clock switch
Reset after a redundant clock switch
Reset after FSCM switches the oscillator to (Group 1) FRC
DS70138E-page 142
© 2007 Microchip Technology Inc.