ISPGDX160V-3Q208I View Datasheet(PDF) - Lattice Semiconductor
Part Name
Description
Manufacturer
ISPGDX160V-3Q208I Datasheet PDF : 36 Pages
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Specifications ispGDX160V/VA
Boundary Scan (Continued)
Figure 13. Boundary Scan Waveforms and Timing Specifications
TMS
S TDI
ICE TCK
Tbtch
Tbtsu
Tbtcl
Tbth
Tbtcp
V ED TDO
DE U Datatobe
IN captured
T T Data to be
driven out
Tbtvo
Tbtco
Valid Data
Tbtcsu
Tbtch
Data Captured
Tbtuov
Tbtuco
Valid Data
Tbtoz
Valid Data
Tbtuoz
Valid Data
C N Symbol
E tbtcp
O tbtch
L tbtcl
E C tbtsu
tbth
S IS trf
tbtco
tbtoz
D tbtvo
Parameter
TCK [BSCAN test] clock pulse width
TCK [BSCAN test] pulse width high
TCK [BSCAN test] pulse width low
TCK [BSCAN test] setup time
TCK [BSCAN test] hold time
TCK [BSCAN test] rise and fall time
TAP controller falling edge of clock to valid output
TAP controller falling edge of clock to data output disable
TAP controller falling edge of clock to data output enable
Min Max Units
100 –
ns
50
–
ns
50
–
ns
20
–
ns
25
–
ns
50
– mV/ns
–
25 ns
–
25 ns
–
25 ns
tbtcpsu BSCAN test Capture register setup time
20
–
ns
tbtcph BSCAN test Capture register hold time
25
–
ns
tbtuco BSCAN test Update reg, falling edge of clock to valid output
–
50 ns
tbtuoz BSCAN test Update reg, falling edge of clock to output disable
–
50 ns
tbtuov BSCAN test Update reg, falling edge of clock to output enable
–
50 ns
25
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