M48T248VPM(2003) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M48T248VPM Datasheet PDF : 24 Pages
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M48T248Y, M48T248V
OPERATION MODES
Table 6. Operating Modes
Mode
VCC
CE
Deselect
VIH
WRITE
4.5V to 5.5V
VIL
or
READ
3.0V to 3.6V
VIL
READ
VIL
Deselect
VSO to VPFD (min)(1)
X
Deselect
≤ VSO(1)
X
Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage
1. See Table 9, page 14 for details.
READ
A READ cycle executes whenever WRITE Enable
(WE) is high and Chip Enable (CE) is low (see Fig-
ure 6). The distinct address defined by the 19 ad-
dress inputs (A0-A18) specifies which of the 512K
bytes of data is to be accessed. Valid data will be
accessed by the eight data output drivers within
the specified Access Time (tACC) after the last ad-
dress input signal is stable, the CE and OE access
times, and their respective parameters are satis-
fied. When CE tACC and OE tACC are not satisfied,
then data access times must be measured from
the more recent CE and OE signals, with the limit-
ing parameter being tCO (for CE) or tOE (for OE) in-
stead of address access.
Figure 6. Memory READ Cycle
OE
WE
DQ7-DQ0
Power
X
X
High-Z
Standby
X
VIL
DIN
VIL
VIH
DOUT
Active
Active
VIH
VIH
High-Z
Active
X
X
High-Z
CMOS Standby
X
X
High-Z
Battery Back-Up
WRITE
WRITE Mode (see Figure 7, page 10 and Figure 8,
page 11) occurs whenever CE and WE signals are
low (after address inputs are stable). The most re-
cent falling edge of CE and WE will determine
when the WRITE cycle begins (the earlier, rising
edge of CE or WE determines cycle termination).
All address inputs must be kept stable throughout
the WRITE cycle. WE must be high (inactive) for a
minimum recovery time (tWR) before a subsequent
cycle is initiated. The OE control signal should be
kept high (inactive) during the WRITE cycles to
avoid bus contention. If CE and OE are low (ac-
tive), WE will disable the outputs for Output Data
WRITE Time (tODW) from its falling edge.
ADDRESSES
CE
OE
DQ0 - DQ7
Note: WE is high for a READ cycle.
tRC
tACC
tCO
tOE
tCOE
tCOE
tOH
tOD
tODO
DATA OUTPUT
VALID
AI04230
9/24
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