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STM32F101C4U6AXXX View Datasheet(PDF) - STMicroelectronics

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STM32F101C4U6AXXX Datasheet PDF : 79 Pages
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STM32F101x4, STM32F101x6
Electrical characteristics
Functional EMS (Electromagnetic susceptibility)
While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the
device is stressed by two electromagnetic events until a failure occurs. The failure is
indicated by the LEDs:
Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until
a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard.
FTB: A Burst of Fast Transient voltage (positive and negative) is applied to VDD and
VSS through a 100 pF capacitor, until a functional disturbance occurs. This test is
compliant with the IEC 61000-4-4 standard.
A device reset allows normal operations to be resumed.
The test results are given in Table 29. They are based on the EMS levels and classes
defined in application note AN1709.
Table 29. EMS characteristics
Symbol
Parameter
Conditions
Level/Class
VFESD
Voltage limits to be applied on any I/O pin to
induce a functional disturbance
VDD = 3.3 V, TA = +25 °C,
fHCLK= 36 MHz
conforms to IEC 61000-4-2
2B
Fast transient voltage burst limits to be
VDD = 3.3 V, TA = +25 °C,
VEFTB applied through 100 pF on VDD and VSS pins fHCLK = 36 MHz
4A
to induce a functional disturbance
conforms to IEC 61000-4-4
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and pre
qualification tests in relation with the EMC level requested for his application.
Software recommendations
The software flowchart must include the management of runaway conditions such as:
Corrupted program counter
Unexpected reset
Critical Data corruption (control registers...)
Prequalification trials
Most of the common failures (unexpected reset and program counter corruption) can be
reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1
second. To complete these trials, ESD stress can be applied directly on the device, over the
range of specification values. When unexpected behavior is detected, the software can be
hardened to prevent unrecoverable errors occurring (see application note AN1015).
Doc ID 15058 Rev 5
49/79

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