ST92124CR1TB View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92124CR1TB

8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E³ ™ (EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

STMicroelectronics 

MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M)

MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (Cont’d)

CHARACTER CONFIGURATION

(CHCR)

R250 - Read/Write

Reset value: undefined

REGISTER

7

0

AM EP PEN AB SB1 SB0 WL1 WL0

Bit 4 = AB: Address/9th Bit.

0: No Address/9th bit.

1: Address/9th bit included in the character format

between the parity bit and the first stop bit. This

bit can be used to address the SCI or as a ninth

data bit.

Bit 7 = AM: Address Mode.

This bit, together with the AMEN bit (in the IDPR

register), decodes the desired addressing/9th data

bit/character match operation. Please refer to the

table in the IDPR register description.

Bit 3:2 = SB[1:0]: Number of Stop Bits..

Number of stop bits

SB1

SB0

in 16X mode in 1X mode

0

0

1

1

0

1

1.5

2

1

0

2

2

Bit 6 = EP: Even Parity.

0: Select odd parity (when parity is enabled).

1: Select even parity (when parity is enabled).

1

1

2.5

3

Bit 5 = PEN: Parity Enable.

0: No parity bit.

1: Parity bit generated (transmit data) or checked

(received data).

Note: If the address/9th bit is enabled, the parity

bit will precede the address/9th bit (the 9th bit is

never included in the parity calculation).

Bit 1:0 = WL[1:0]: Number of Data Bits

WL1

0

0

1

1

WL0

0

1

0

1

Data Length

5 bits

6 bits

7 bits

8 bits

233/429

9

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