LTC1066-1
PIN FUNCTIONS
(see Block Diagram). Input bias current flows out of pins
2 and 3. Pin 16 (+IN B) is the positive input of a high
performance op amp B which is internally connected as
a unity-gain follower. Op amp B buffers the switched-
capacitor network output. The input capacitance of both
op amps is 10pF.
Pin 14 (FILTERIN) is the input of a switched-capacitor
network. The input impedance of pin 14 is typically 11k.
Output Pins (1, 7, 17)
Pins 1 and 17 are the outputs of the internal high perfor-
mance op amps A and B. Pin 1 is usually connected to the
internal switched-capacitor filter network input pin 14. Pin
17 is the buffered output of the filter and it can drive loads
as heavy as 200Ω (see THD + Noise curves under Typical
Performance Characteristics). Pin 7 is the internal switched-
capacitor network output and it can typically sink or
source 1mA.
Compensation Pins (11, 13)
Pins 11 and 13 are the AC compensation pins. If compen-
sation is needed, an external 30k resistor in series with a
15pF capacitor should be connected between pins 11 and
13. Compensation is recommended for the following
cases shown in Table 6.
Table 6. Cases Where an RC Compensation (15pF in Series with
30kΩ pins 11, 13) is Recommended, fCLK/fCUTOFF = 50:1
VS = Single 5V (AGND = 2V)
TA = 25°C
TA = 70°C
fCUTOFF ≥ 28kHz
fCUTOFF ≥ 24kHz
VS = ±5V
TA = 25°C
TA = 70°C
fCUTOFF ≥ 60kHz
fCUTOFF ≥ 50kHz
VS = ±7.5V
TA = 25°C
TA = 70°C
fCUTOFF ≥ 70kHz
fCUTOFF ≥ 60kHz
Connect Pins (6, 12)
Pin 6 (CONNECT 1) and pin 12 (CONNECT 2) should be
shorted. In a printed circuit board the connection should
be done under the IC package through a short trace
surrounded by the analog ground plane. Pin 6 should be
0.2 inches away from any other circuit trace.
BLOCK DIAGRAM
RF
CF
2
–IN A
3
+IN A
–
HIGH SPEED
OP AMP
+
1
OUT A
V+ V– GND 50/100 CLK
5,18 4,10 15 8 9
LTC1066-1
14
FILTERIN
CONNECT 1
6
8TH ORDER
SWITCHED-
CAPACITOR
NETWORK
11 COMP1
13 COMP2
12
CONNECT 2
7
FILTEROUT
16
+IN B
–
HIGH SPEED
OP AMP
+
17
OUT B
PATENT PENDING
11066-1 BD
8