LTC1402CGN View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LTC1402CGN

Serial 12-Bit, 2.2Msps Sampling ADC with Shutdown

Linear Technology 

LTC1402

APPLICATIONS INFORMATION

more than 0.25 inch long to the common reference. You

may also choose to tie AGND2 (Pin 6) directly to a solid

analog ground plane and eliminate all the 10µF capacitors

at this pin. The external reference source needs to have

enough output drive current for the 2kΩ load at each ADC.

FULL-SCALE AND OFFSET ADJUSTMENT

Figure 9 shows the ideal input/output characteristics for

the LTC1402 in bipolar mode and unipolar mode. Figure

10a shows the components required for full-scale error

adjustment. Figure 10b includes the components for off-

set and full-scale adjustment.

Adjustment in Unipolar Mode with Pin 8 Held Low

The code transitions occur midway between successive

integer LSB values (i.e., – FS + 0.5LSB, – FS + 1.5LSB,

– FS + 2.5LSB,...FS – 2.5LSB, FS – 1.5LSB). The output at

DOUT is binary with 1LSB = FS/4096 = 4.096V/4096 =

1.0mV. In applications where absolute accuracy is impor-

tant, offset and full-scale errors can be adjusted to zero.

Offset error must be adjusted before full-scale error. In

Figure 10b, zero offset is achieved by adjusting the offset

applied to the AIN– input. For zero offset error apply

– 0.5mV (i.e., – 0.5LSB) to AIN+ and adjust the offset at the

AIN– input using R8 until the output code flickers between

011...111

011...110

011...101

111...111

111...110

111...101

100...010

100...001

100...000

– (FS – 1LSB)

000...010

000...001

000...000

FS – 1LSB

INPUT VOLTAGE (V)

1402 F09

Figure 9. LTC1402 Transfer Characteristic

Adjustment in Bipolar Mode with Pin 8 Held High

The code transitions occur midway between successive

integer LSB values (i.e., – FS + 0.5LSB, – FS + 1.5LSB, – FS

+ 2.5LSB,...FS – 2.5LSB, FS – 1.5LSB). The output at DOUT

is two’s complement binary with 1LSB = FS – (– FS)/4096

= 4.096V/4096 = 1.0mV. In applications where absolute

accuracy is important, offset and full-scale errors can be

adjusted to zero. Offset error must be adjusted before full-

scale error. In Figure 10b, zero offset is achieved by

adjusting the offset applied to the AIN– input. For zero

offset error, apply – 0.5mV (i.e., – 0.5LSB) to AIN+ and

adjust the offset at the AIN– input using R8 until the output

code flickers between 0000 0000 0000 and 1111 1111

1111. For full-scale adjustment in Figures 10a and 10b,

apply an input voltage of 2.0465V (FS – 1.5LSB) to AIN+

and adjust R5 until the output code flickers between 0111

1111 1110 and 0111 1111 1111.

ANALOG INPUT

0V TO 4.096V

OR ± 2.048V

R1

51Ω

3 AIN+

R3 R2

51Ω 39k 4 AIN–

R4

470k

5 VREF

10µF

LTC1402

S/H

2.048V BANGAP

REFERENCE

REFERENCE

AMP

64k

R5

500Ω

7 GAIN

64k

6 AGND2

1402 F010a

Figure 10a. Full-Scale Adjustment Circuit with

±10LSB Range

5V

R1

51Ω

ANALOG INPUT

0V TO 4.096V R3

OR ± 2.048V 51Ω

R6

24k 3 AIN+

R2

24k 4 AIN–

5V

OFFSET R8

ADJ 10k

R7

7.5k

R4

470k

5 VREF

10µF

LTC1402

S/H

2.048V BANGAP

REFERENCE

REFERENCE

AMP

64k

FULL-SCALE R5

ADJ 500Ω

7 GAIN

64k

6 AGND2

1402 F010b

Figure 10b. Offset and Full-Scale Adjustment

Circuits with ±10LSB Range

14

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