LTC2209IUP(RevA) View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LTC2209IUP
(Rev.:RevA)

16-Bit, 160Msps ADC

Linear Technology 

APPLICATIONS INFORMATION

PC BOARD

CLKOUT

FPGA

LTC2209

OF

D15/D0

D14/D0

D2/D0

D1/D0

D0

D15

D14

•

•

•

D2

D1

D0

LTC2209

Internal Dither

The LTC2209 is a 16-bit ADC with a very linear transfer

function; however, at low input levels even slight imperfec-

tions in the transfer function will result in unwanted tones.

Small errors in the transfer function are usually a result

of ADC element mismatches. An optional internal dither

mode can be enabled to randomize the input location on

the ADC transfer curve, resulting in improved SFDR for

low signal levels.

As shown in Figure 15, the output of the sample-and-hold

amplifier is summed with the output of a dither DAC. The

dither DAC is driven by a long sequence pseudo-random

number generator; the random number fed to the dither

DAC is also subtracted from the ADC result. If the dither

DAC is precisely calibrated to the ADC, very little of the

dither signal will be seen at the output. The dither signal

that does leak through will appear as white noise. The dither

DAC is calibrated to result in less than 0.5dB elevation in

the noise floor of the ADC, as compared to the noise floor

with dither off.

2209 F14

Figure 14. Descrambling a Scrambled Digital Output

LTC2209

AIN+

ANALOG

S/H

INPUT

AIN–

AMP

16-BIT

PIPELINED

ADC CORE

DIGITAL

SUMMATION

OUTPUT

DRIVERS

CLKOUT

OF

D15

•

•

•

D0

CLOCK/DUTY

CYCLE

CONTROL

PRECISION

DAC

MULTIBIT DEEP

PSEUDO-RANDOM

NUMBER

GENERATOR

ENC + ENC –

2209 F15

DITH

DITHER ENABLE

HIGH = DITHER ON

LOW = DITHER OFF

Figure 15. Functional Equivalent Block Diagram of Internal Dither Circuit

2209fa

25

Share Link: