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LTC3732CUHF View Datasheet(PDF) - Linear Technology

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Description
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LTC3732CUHF Datasheet PDF : 28 Pages
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LTC3732
APPLICATIO S I FOR ATIO
3) Are the SENSEand SENSE+ printed circuit traces for
each channel routed together with minimum PC trace
spacing? The filter capacitors between SENSE+ and SENSE
for each channel should be as close as possible to the pins
of the IC. Connect the SENSEand SENSE+ pins to the
pads of the sense resistor as illustrated in Figure 12.
4) Do the (+) plates of CPWR connect to the drains of the
topside MOSFETs as closely as possible? This capacitor
provides the pulsed current to the MOSFETs.
5) Keep the switching nodes, SWITCH, BOOST and TG
away from sensitive small-signal nodes (SENSE+, SENSE
IN+, IN, EAIN). Ideally the SWITCH, BOOST and TG
printed circuit traces should be routed away and separated
from the IC and the “quiet” side of the IC. Separate the high
dV/dt traces from sensitive small-signal nodes with ground
traces or ground planes.
6) Use a low impedance source such as a logic gate to drive
the PLLIN pin and keep the lead as short as possible.
SW1
L1
RSENSE1
D1
VIN
RIN +
CIN
L2
VOUT
SW2
RSENSE2
+
D2
COUT
RL
BOLD LINES INDICATE HIGH,
SWITCHING CURRENT LINES.
KEEP LINES TO A MININMUM
LENGTH
SW3
D3
L3
RSENSE3
3732 F11
Figure 11. Branch Current Waveforms
3732f
23

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