LTC3732CUHF View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LTC3732CUHF

3-Phase, 5-Bit VID, 600kHz, Synchronous Buck Switching Regulator Controller

Linear Technology 

LTC3732

APPLICATIO S I FOR ATIO

Figure 11 illustrates all branch currents in a three-phase

switching regulator. It becomes very clear after studying

the current waveforms why it is critical to keep the high

switching current paths to a small physical size. High elec-

tric and magnetic fields will radiate from these “loops” just

as radio stations transmit signals. The output capacitor

ground should return to the negative terminal of the input

capacitor and not share a common ground path with any

switched current paths. The left half of the circuit gives rise

to the “noise” generated by a switching regulator. The

ground terminations of the synchronous MOSFETs and

Schottky diodes should return to the bottom plate(s) of the

input capacitor(s) with a short isolated PC trace since very

high switched currents are present. A separate isolated path

from the bottom plate(s) of the input and output capacitor(s)

should be used to tie in the IC power ground pin (PGND).

This technique keeps inherent signals generated by high

current pulses taking alternate current paths that have fi-

nite impedances during the total period of the switching

regulator. External OPTI-LOOP compensation allows over-

compensation for PC layouts which are not optimized but

this is not the recommended design procedure.

INDUCTOR

LTC3732

SENSE+

SENSE–

1000pF

SENSE

RESISTOR

3732 F12b

OUTPUT CAPACITOR

Figure 12. Kelvin Sensing RSENSE

Simplified Visual Explanation of How a 3-Phase

Controller Reduces Both Input and Output RMS

Ripple Current

The effect of multiphase power supply design significantly

reduces the amount of ripple current in both the input and

output capacitors. The RMS input ripple current is divided

by, and the effective ripple frequency is multiplied up by

the number of phases used (assuming that the input

voltage is greater than the number of phases used times

the output voltage). The output ripple amplitude is also

24

reduced by, and the effective ripple frequency is increased

by the number of phases used. Figure 13 graphically

illustrates the principle.

SW V

SINGLE PHASE

ICIN

ICOUT

SW1 V

SW2 V

SW3 V

IL1

IL2

IL3

TRIPLE PHASE

ICIN

ICOUT

3732 F13

Figure 13. Single and Polyphase Current Waveforms

The worst-case input RMS ripple current for a single stage

design peaks at twice the value of the output voltage. The

worst-case input RMS ripple current for a two stage

design results in peaks at 1/4 and 3/4 of the input voltage,

and the worst-case input RMS ripple current for a three

stage design results in peaks at 1/6, 1/2, and 5/6 of the

input voltage. The peaks, however, are at ever decreasing

levels with the addition of more phases. A higher effective

duty factor results because the duty factors “add” as long

as the currents in each stage are balanced. Refer to AN19

for a detailed description of how to calculate RMS current

for the single stage switching regulator.

Figure 6 illustrates the RMS input current drawn from the

input capacitance versus the duty cycle as determined by

the ration of input and output voltage. The peak input RMS

current level of the single phase system is reduced by 2/3

in a 3-phase solution due to the current splitting between

the three stages.

3732f

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