LTC6909(RevA) View Datasheet(PDF) - Linear Technology
Part Name
Description
Manufacturer
LTC6909
(Rev.:RevA)
(Rev.:RevA)
Linear Technology
LTC6909 Datasheet PDF : 22 Pages
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LTC6909
Applications Information
9. The connections for PH0, PH1 and PH2 are not shown
in Figure 6. These pins are connected to either GND or
V+D depending on the output phasing required for the
application. Connection to ground is done underneath
the part. Connecting PH2 to V+D is also straightforward.
Connecting PH0 or PH1 to V+D may require one or
both traces to go down a layer. If you are dynamically
changing one or all of the PH pins, place a 10k resis-
tor in series with the signal line. Locate the resistor
fairly close to the PH pin. This signal typically comes
from a microcontroller or the power good signal from
a switching regulator and is usually quite noisy. The
series resistor provides some isolation between the
noisy signal and the LTC6909.
Start-Up ISSUES AND CONSIDERATIONS
The start-up time and settling time to within 1% of the
final value is estimated by the following equation:
tSTART
≈ RSET
•
25µs
1k
+ 10 µs
For instance, with RSET = 100k, the LTC6909 will settle to
within 1% of its 1MHz final value in approximately 260µs.
Figure 7 shows the start-up time for various RSET resistors.
To assist in an orderly start-up sequence, the LTC6909’s
outputs are in a high impedance state for the first 128
master clock cycles after power-up. This ensures that
the first clock cycle is very close to the desired operating
frequency.
Powering up and down complex multiphase switching
regulator circuits is always chaotic and can have serious
system consequences if it is not done carefully. In addition
to the LTC6909’s muting of the outputs to ensure first cycle
accuracy, the PH0-PH1-PH2 codes 000 (all outputs are
10000
VTA+
=
=
25°C
3V
1000
100
10
1k
10k
100k
1M
10M
RSET (Ω)
6909 F07
Figure 7. Start-Up Time
C1
0.1µF
GROUND
PLANE
RSET
LTC6909
V+A
SET
GND
PH2
PH0
MOD
PH1
V+D
OUT1
OUT8
C2
0.1µF
GROUND
PLANE
DIRECT, LOW IMPEDANCE
CONNECTION TO THE V+
SUPPLY
C1
V+A
GND
PH0
PH1
OUT1
OUT2
OUT3
OUT4
RSET
Figure 6. Supply Bypassing and PCB Layout
SET
PH2
MOD
V+D
OUT8
OUT7
OUT6
OUT5
C2
6909 F06
6909fa
15
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