M41ST85W
Clock operation
Note:
Bits RPT5–RPT1 put the alarm in the repeat mode of operation. Table 3 shows the possible
configurations. Codes not listed in the table default to the once per second mode to quickly
alert the user of an incorrect alarm setting.
When the clock information matches the alarm clock settings based on the match criteria
defined by RPT5–RPT1, the AF (Alarm Flag) is set. If AFE (Alarm Flag Enable) is also set,
the alarm condition activates the IRQ/FT/OUT pin as shown in Figure 15. To disable alarm,
write '0' to the Alarm Date Register and to RPT5–RPT1.
If the address pointer is allowed to increment to the Flag Register address, an alarm
condition will not cause the Interrupt/Flag to occur until the address pointer is moved to a
different address. It should also be noted that if the last address written is the “Alarm
Seconds,” the address pointer will increment to the Flag address, causing this situation to
occur.
The IRQ/FT/OUT output is cleared by a READ to the Flags Register. A subsequent READ of
the Flags Register is necessary to see that the value of the Alarm Flag has been reset to '0.'
The IRQ/FT/OUT pin can also be activated in the battery back-up mode. The IRQ/FT/OUT
will go low if an alarm occurs and both ABE (Alarm in Battery Back-up Mode Enable) and
AFE are set. The ABE and AFE Bits are reset during power-up, therefore an alarm
generated during power-up will only set AF. The user can read the Flag Register at system
boot-up to determine if an alarm was generated while the M41ST85W was in the deselect
mode during power-up. Figure 16 on page 24 illustrates the back-up mode alarm timing.
Figure 15. Alarm interrupt reset waveform
0Eh
0Fh
ACTIVE FLAG
IRQ/FT/OUT
Table 3. Alarm repeat modes
RPT5
RPT4
1
1
1
1
1
1
1
1
1
0
0
0
RPT3
1
1
1
0
0
0
RPT2
1
1
0
0
0
0
10h
HIGH-Z
AI03664
RPT1
1
0
0
0
0
0
Alarm setting
Once per Second
Once per minute
Once per hour
Once per day
Once per month
Once per year
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