MSC7119VM1200 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MSC7119VM1200

Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC

Freescale Semiconductor 

TDMxTCK

TDMxTD

TDMxRCK

300

301

302

307

306

310

2.5.6

TDMxTFS (output)

TDMxTFS (input)

305

303

Figure 9. TDM Transmit Signals

Ethernet Timing

2.5.6.1 Receive Signal Timing

Table 21. Receive Signal Timing

No.

Characteristics

800 Receive clock period:

• MII: RXCLK (max frequency = 25 MHz)

• RMII: REFCLK (max frequency = 50 MHz)

801 Receive clock pulse width high—as a percent of clock period

• MII: RXCLK

• RMII: REFCLK

802 Receive clock pulse width low—as a percent of clock period:

• MII: RXCLK

• RMII: REFCLK

803 RXDn, RX_DV, CRS_DV, RX_ER to receive clock rising edge setup time

804 Receive clock rising edge to RXDn, RX_DV, CRS_DV, RX_ER hold time

Electrical Characteristics

309

308

311

Min Max Unit

40

—

ns

20

—

ns

35

65

%

14

—

ns

7

—

ns

35

65

%

14

—

ns

7

—

ns

4

—

ns

2

—

ns

Receive

clock

RXDn

RX_DV

CRS_DV

RX_ER

800

802

801

803

804

Valid

Figure 10. Ethernet Receive Signal Timing

MSC7119 Data Sheet, Rev. 8

Freescale Semiconductor

29

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