STE100P(2000) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STE100P Datasheet PDF : 29 Pages
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STE100P
Table 4. Register Descriptions
Bit #
Name
Descriptions
0
REF Interrupt source of Receive Error full.
0: the receive error number is less than 64.
1: 64 error packets are received.
LH = High Latching and cleared by reading.
PR18- XIE, XCVR Interrupt Enable Register
15~7
---
Reserved
6
ANCE Auto-Negotiation Completed interrupt Enable.
0: disable Auto-Negotiation completed interrupt.
1: enable Auto-Negotiation complete interrupt.
5
RFE Remote Fault detected interrupt Enable.
0: disable remote fault detection interrupt.
1: enable remote fault detection interrupt.
4
LDE
Link Down interrupt Enable.
0: disable link fail interrupt.
1: enable link fail interrupt.
3
ANAE Auto-Negotiation Acknowledge interrupt Enable.
0: disable link partner acknowledge interrupt
1: enable link partner acknowledge interrupt.
2
PDFE Parallel Detection Fault interrupt Enable.
0: disable fault parallel detection interrupt.
1: enable fault parallel detection interrupt.
1
ANPE Auto-Negotiation Page Received interrupt Enable.
0: disable Auto-Negotiation page received interrupt.
1: enable Auto-Negotiation page received interrupt.
0
REFE RX_ERR full interrupt Enable.
0: disable rx_err full interrupt.
1: enable more than 64 time rx_err interrupt,
PR19- 100CTR, 100BASE-TX Control Register
15,14
---
reserved
13
DISRER Disable the RX_ERR counter.
0: the receive error counter - RX_ERR is enabled.
1: the receive error counter - RX_ERR is disabled.
12
ANC Auto-Negotiation completed. This bit is the same as PR1:5.
0: the Auto-Negotiation process has not completed yet.
1: the Auto-Negotiation process has completed.
11
RXVPP Select peak to peak voltage of receive.
0: receive voltage peak to peak 1.0 VPP
1: receive voltage peak to peak 1.4 VPP.
10
---
reserved
9
ENRLB Enable remote loop-back function. 1: enable 0: disable
8
ENDCR Enable DC restoration.
0: disable DC restoration.
1: enable DC restoration.
Default Val RW Type
0
RO/LH*
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
RO
0
R/W
0
R/W
1
R/W
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