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PIC16LC924-08/CL View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16LC924-08/CL
Microchip
Microchip Technology 
PIC16LC924-08/CL Datasheet PDF : 189 Pages
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PIC16C9XX
4.2.2.4 PIE1 REGISTER
This register contains the individual enable bits for the
peripheral interrupts.
Note: Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
FIGURE 4-6: PIE1 REGISTER (ADDRESS 8Ch)
R/W-0 R/W-0
U-0
LCDIE ADIE(1)
bit7
U-0
R/W-0 R/W-0 R/W-0 R/W-0
SSPIE CCP1IE TMR2IE TMR1IE
bit0
bit 7:
LCDIE: LCD Interrupt Enable bit
1 = Enables the LCD interrupt
0 = Disables the LCD interrupt
bit 6:
ADIE: A/D Converter Interrupt Enable bit(1)
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
bit 5-4: Unimplemented: Read as '0'
bit 3:
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
bit 2:
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
bit 1:
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
bit 0:
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
Note 1: Bit ADIE is reserved on the PIC16C923, always maintain this bit clear.
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n = Value at POR reset
DS30444E - page 26
© 1997 Microchip Technology Inc.

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