PIC16C9XX
4.2.2.6 PCON REGISTER
The Power Control (PCON) register contains a flag bit
to allow differentiation between a Power-on Reset
(POR) to an external MCLR Reset or WDT Reset.
FIGURE 4-8: PCON REGISTER (ADDRESS 8Eh)
For various reset conditions see Table 14-4 and
Table 14-5.
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
U-0
—
—
—
—
—
bit7
bit 7-2: Unimplemented: Read as '0'
—
POR
—
R = Readable bit
bit0 W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit 1:
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0: Unimplemented: Read as '0'
DS30444E - page 28
© 1997 Microchip Technology Inc.