PCA85176(2010) View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
PCA85176 Datasheet PDF : 44 Pages
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NXP Semiconductors
PCA85176
Universal LCD driver for low multiplex rates
Table 19. SYNC contact resistance
Number of devices
2
3 to 5
6 to 10
10 to 16
Maximum contact resistance
6 kΩ
2.2 kΩ
1.2 kΩ
700 Ω
The PCA85176 can always be cascaded with other devices of the same type or
conditionally with other devices of the same family. This allows optimal drive selection for
a given number of pixels to display. Figure 21 and Figure 24 show the timing of the
synchronization signals.
In a cascaded configuration only one PCA85176 master must be used as clock source. All
other PCA85176 in the cascade must be configured as slave such that they receive the
clock from the master.
If an external clock source is used, all PCA85176 in the cascade must be configured such
as to receive the clock from that external source (pin OSC connected to VDD). Thereby it
must be ensured that the clock tree is designed such that on all PCA85176 the clock
propagation delay from the clock source to all PCA85176 in the cascade is as equal as
possible since otherwise synchronization artefacts may occur.
In mixed cascading configurations, care has to be taken that the specifications of the
individual cascaded devices are met at all times.
PCA85176_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 14 April 2010
© NXP B.V. 2010. All rights reserved.
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