ST52T441F3M6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST52T441F3M6

8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Timer/PWM, Analog Comparator, Triac/PWM Timer, WDG

STMicroelectronics 

ST52T400/T440/E440/T441

The 13-bit length allows the direct addressing of

8192 bytes in the program space: jump and call

instruction support the absolute addressing in all

the memory.

After having read the current instruction address,

the PC value is incremented. The result of this

operation is shifted back into the PC.

The PC can be changed in the following ways:

s JP (Jump) instruction PC = Jump Address

s Interrupt

PC = Interrupt Vector

s RETI instruction

PC = Pop (stack)

s Reset

PC = Reset Vector

s Normal Instruction PC = PC + 1

2.1.2 Flags.

The ST52x400/440/441 core includes different

sets of flags that correspond to 2 different modes:

normal mode and interrupt mode. Each set of

flags consist of a CARRY flag (C), ZERO flag (Z)

and SIGN flag (S). One set of flags (CN, ZN, SN)

is used during normal operation and one is used

during interrupt mode (CI, ZI, SI). Formally, the

user has to manage only one set of flags: C, Z and

S.

The ST52x400/440/441 core uses the flags that

correspond to the actual mode: as soon as an

interrupt is generated, the ST FIVE core uses the

interrupt flags instead of the normal flags.

Each interrupt level has its own set of flags, which

is saved in the Flag Stack during interrupt servic-

ing.

These flags are restored from the Flag Stack auto-

matically when a RETI instruction is executed.

If the ICU was in the normal mode before an inter-

rupt, after the RETI instruction is executed, the

normal flags are restored.

Note: A CALL subroutine is a normal mode exe-

cution. For this reason a RET instruction, conse-

quent to a CALL instruction, doesn’t affect the

normal mode set of flags.

Flags are not cleared during context switching and

remain in the state they were located in at the end

of the last interrupt routine switching.

The Carry flag is set when an overflow occurs dur-

ing arithmetic operations, otherwise it is cleared.

The Sign flag is set when an underflow occurs

during arithmetic operations, otherwise it is

cleared.

2.2 Address Spaces

ST52x400/440/441 has four separate address

spaces:

s RAM: 128 or 256 Bytes

s 20 Input Registers

s 6 Output Registers

s 21 Configuration Registers

s Program memory: up to 8K Bytes

The Program Memory will be described in further

details in the EPROM section

Figure 2.4 Address Spaces Description

PROGRAM MEMORY

NON VOLATILE MEMORY

ST FIVE CORE

DATA RAM

LDFR

DP

REGISTERS

LDPR

LDRE

ON CHIP PERIPHERALS

OUTPUT

REGISTER

PERIPHERAL

BLOCK

INPUT REGISTERS

LDRI

PROGRAM

COUNTER

CU

DPU

ALU

LDCR

CONFIGURATION

REGISTERS

PERIPHERAL

BLOCK

PERIPHERAL

BLOCK

LDPE

LDCE

21/94

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