ST52T400/T440/E440/T441
3 EPROM PROGRAMMING
EPROM memory provides an on-chip user-pro-
grammable non-volatile memory, which allows fast
and reliable storage of user data.
EPROM memory can be locked by the user. In
fact, a memory location, called Lock Cell, is
devoted to lock the EPROM and to prevent
Table 3.1 EPROM Control Register
OPERATION
Stand By
REGISTER VALUE
0
Memory
1
Reading / Verify
Memory Unlock and
2
Lock Status Reading
Memory
3
Writing
Memory
4
Lock
ID CODE
5
Writing
Memory Lock Status
9
Reading / Verify
ID CODE
10
Reading / Verify
memory reading. A software identification code
(max 64 bytes), called ID CODE may also be writ-
ten in order to distinguish which software version
is stored in the memory.
There are 64 kbits of memory space with an 8-bit
internal parallelism (8 kbytes) addressed by a 13-
bit bus. The data bus is of 8 bits.
Memory has a double supply: VPP is equal to
12V±5% in Programming Phase or to VSS during
Working Phase. VDD is equal to 5V±10%.
The ST52x400/440/441 EPROM memory is
divided into three main blocks (see Figure 3.1):
• Interrupt Vectors memory block (3 through 14)
contains the addresses for the interrupt rou-
tines. Each address is composed of three
bytes.
• Mbfs Setting memory block (15 through 1024)
contains the coordinates of the vertexes of
every Mbf defined in the program. If this part of
the memory is not used to store the Mbfs set-
ting, it can be use to store the instruction set on
the user program.
• The Program Instruction Set memory block
(1024 through 8191) contains the instruction
set of the user program.
Figure 3.1 Program Memory Organization
2000h
PROGRAM INSTRUCTIONS
AND PERMANENT DATA
0400h
0015h
0003h
0000h
PROGRAM INSTRUCTIONS
AND PERMANENT DATA
MEMBERSHIP FUNCTIONS
PARAMETERS
INTERRUPT VECTORS
RESET VECTOR
33/94