ST52T400 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST52T400

8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Timer/PWM, Analog Comparator, Triac/PWM Timer, WDG

STMicroelectronics 

ST52T400/T440/E440/T441

Figure 6.2 Port B Functional Blocks

Vcc

FROM CONFIGURATION REGISTER

22 k

TO INPUT REGISTER

CMOS

TO A/D CONVERTER

PORT B PIN

FROM OUTPUT REGISTERS

FROM CONFIGURATION REGISTER

6.2 Input Mode

The input configuration is selected setting the cor-

responding configuration register bit in

REG_CONF4, REG_CONF13 and, where appli-

cable, REG_CONF11 (see Paragraph I/O Port

Configuration Registers) to “1”. To use Port A and

B pins as digital input, the corresponding bits in

REG_CONF12 and REG_CONF14 must be set

according to the values shown in Table 6.4, Table

6.5 and Table 6.6.

Table 6.2 Input Register and I/O Ports

PORT A

PORT B

IR 14

IR 15

(*) Not used for ST52x400F/440F/441F

PORT C (*)

IR 16

Table 6.3 Output Register and I/O Ports

PORT A

PORT B

OR 0

OR 1

(*) Not used for ST52x400F/440F/441F

PORT C (*)

OR 2

Digital input data is automatically stored in

the Input Registers (see Table 6.2), but the single

bit of the Input Register (IR) cannot be read

directly and the value in a RAM location must be

copied. Digital data is stored in a RAM location by

using the assembler instruction:

LDRI regx,inpy

Then, each single bit can be examined by using

AND and OR operators with a suited mask value.

6.3 Output Mode

The output pin configuration is selected by setting

the corresponding configuration register bit to “0”

(REG_CONF4, REG_CONF13 and, where appli-

cable, REG_CONF11) (see paragraph I/O Port

Configuration Registers). in order to use Port A

and B pins as digital output, the corresponding bits

in REG_CONF12 and REG_CONF14 must be set

according to the values illustrated in Tables - Port

A - REG_CONF 4, - Port A - REG_CONF 12 and

Analog Inputs REG_CONF 14.

Digital data is transferred to the related I/O Port by

means of the Output register (see Table 6.3), by

using the assembler instructions LDPE or LDPR

that respectively take the value to be transferred

to the ports from EPROM and RAM.

47/94

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