ST52T400 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST52T400

8-BIT INTELLIGENT CONTROLLER UNIT (ICU) Timer/PWM, Analog Comparator, Triac/PWM Timer, WDG

STMicroelectronics 

ST52T400/T440/E440/T441

7 ANALOG COMPARATOR (ST52X440/441)

7.1 Analog Module Overview

The ST52x440/441 includes an Analog Compara-

tor (AC) among its peripherals.

The Analog Comparator is endowed with analog

and digital elements in order to also allow the user

to make use of it as a single slope Analog to Digi-

tal converter. In particular, ST52x440/441 is

endowed with:

s Analog Comparator;

s 7 channels analog mux (6 external lines, 1

internal voltage reference);

s a current source providing 7 programmable

values;

s 16 bit Timer with a Capture Register and 12 bit

Prescaler;

The Analog Comparator peripheral can also be

used as a single slope A/D, supplying a ramp sig-

nal to the pin CS. The selection of the working

mode, as either Analog Comparator or single

slope A/D can be performed via the

REG_CONF3[(0)] bit.

7.2 Comparator Mode

In Analog Comparator mode, REG_CONF3[(0)] is

set to “0”. The AC inputs are available on the

external pins. The reference signal must be con-

nected to the CS pin, the signal to be compared

goes to the analog input AC0.

When the input becomes lower than the refer-

ence, the Analog Comparator output changes to

value “1”. The output can be read on the less sig-

nificative bit of Input Register 1 AC_CHAN0H

(Table 2.1).

7.3 A/D Converter Mode

To use the Analog Comparator for A/D Conver-

sion, REG_CONF3[(0)] bit must be set to “1”.

In A/D Mode either the insertion of an external

capacitor to pin CS or the connection to an exter-

nal signal to generate the reference ramp may be

chosen.

In the first case REG_CONF16[(1)] bit must be set

to “0”. The internal current generator, utilized to

charge the capacitor, provides 7 possible current

values, which can be selected via

REG_CONF3[(7:5)]. The current values are in the

range between 0 to 70µA with step of 10µA.

The capacitor should have a low voltage coeffi-

Figure 7.1 Analog Peripheral Block Diagram

A/D Configuration Registers

76543210

76543210

AC0

AC1

AC2

AC3

AC4

AC5

GNDA

Bandgape Ref.=2.5V

CS

CLK

12 bit Presc.

Timer CLK

-

Stop Count 16 bit Timer Start

+

Converted

Value

Current Sel.

76543210

A/D Configuration Registers

Vcc

50/94

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