PIC16C62X
12.9 Timing Diagrams and Specifications
FIGURE 12-12: EXTERNAL CLOCK TIMING
Q4
OSC1
CLKOUT
Q1
Q2
Q3
1
3
3
2
Q4
Q1
4
4
TABLE 12-3: EXTERNAL CLOCK TIMING REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min Typ† Max Units
Conditions
1A
Fosc External CLKIN Frequency(1)
Oscillator Frequency(1)
DC
—
4
MHz XT and RC Osc mode, VDD=5.0V
DC
—
20 MHz HS Osc mode
DC
—
200 kHz LP Osc mode
DC
—
4
MHz RC Osc mode, VDD=5.0V
0.1
—
4
MHz XT Osc mode
1
Tosc External CLKIN Period(1)
Oscillator Period(1)
1
—
20 MHz HS Osc mode
DC
—
200 kHz LP Osc mode
250
—
—
ns XT and RC Osc mode
50
—
—
ns HS Osc mode
5
—
—
µs LP Osc mode
250
—
—
ns RC Osc mode
250
— 10,000 ns XT Osc mode
50
—
1,000 ns HS Osc mode
2
TCY
Instruction Cycle Time(1)
5
—
—
1.0 FOSC/4 DC
µs LP Osc mode
µs TCYS=FOSC/4
3*
TosL, External Clock in (OSC1) High or 100*
—
TosH Low Time
2*
—
—
ns XT oscillator, TOSC L/H duty cycle
—
µs LP oscillator, TOSC L/H duty cycle
20*
—
—
ns HS oscillator, TOSC L/H duty cycle
4*
TosR, External Clock in (OSC1) Rise or
25*
—
—
ns XT oscillator
TosF Fall Time
50*
—
—
ns LP oscillator
2: *
3: †
Note 1:
15*
—
—
ns HS oscillator
These parameters are characterized but not tested.
Data in "Typ" column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and
are not tested.
Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are based
on characterization data for that particular oscillator type under standard operating conditions with the device
executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than
expected current consumption. All devices are tested to operate at "min." values with an external clock applied to
the OSC1 pin. When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices.
DS30235J-page 104
2003 Microchip Technology Inc.