PIC16CR620A-04E/SS View Datasheet(PDF) - Microchip Technology
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PIC16CR620A-04E/SS Datasheet PDF : 128 Pages
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PIC16C62X
9.4.5 TIME-OUT SEQUENCE
On power-up the time-out sequence is as follows: First
PWRT time-out is invoked after POR has expired. Then
OST is activated. The total time-out will vary based on
oscillator configuration and PWRTE bit status. For
example, in RC mode with PWRTE bit erased (PWRT
disabled), there will be no time-out at all. Figure 9-8,
Figure 9-9 and Figure 9-10 depict time-out sequences.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(see Figure 9-9). This is useful for testing purposes or
to synchronize more than one PIC16C62X device
operating in parallel.
Table 9-4 shows the RESET conditions for some
special registers, while Table 9-5 shows the RESET
conditions for all the registers.
9.4.6
POWER CONTROL (PCON)/
STATUS REGISTER
The power control/STATUS register, PCON (address
8Eh), has two bits.
Bit0 is BOR (Brown-out). BOR is unknown on Power-
on Reset. It must then be set by the user and checked
on subsequent RESETS to see if BOR = 0, indicating
that a brown-out has occurred. The BOR STATUS bit is
a don’t care and is not necessarily predictable if the
brown-out circuit is disabled (by setting BODEN bit = 0
in the Configuration word).
Bit1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent RESET, if POR is ‘0’, it will indicate that a
Power-on Reset must have occurred (VDD may have
gone too low).
TABLE 9-1: TIME-OUT IN VARIOUS SITUATIONS
Oscillator Configuration
Power-up
PWRTE = 0
PWRTE = 1
XT, HS, LP
RC
72 ms + 1024 TOSC
72 ms
1024 TOSC
—
Brown-out Reset
Wake-up
from SLEEP
72 ms + 1024 TOSC
72 ms
1024 TOSC
—
TABLE 9-2: STATUS/PCON BITS AND THEIR SIGNIFICANCE
POR
BOR
TO
PD
0
X
1
1
0
X
0
X
0
X
X
0
1
0
X
X
1
1
0
u
1
1
0
0
1
1
u
u
1
1
1
0
Legend: u = unchanged, x = unknown
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP
TABLE 9-3: SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT
Address Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on all
Value on other
POR Reset RESETS(1)
83h
STATUS
TO PD
0001 1xxx 000q quuu
8Eh
PCON
—
—
—
—
—
— POR BOR ---- --0x ---- --uq
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: Other (non Power-up) Resets include MCLR Reset, Brown-out Reset and Watchdog Timer Reset during
normal operation.
2003 Microchip Technology Inc.
DS30235J-page 51
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