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ST7LITES2 View Datasheet(PDF) - STMicroelectronics

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ST7LITES2 Datasheet PDF : 125 Pages
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ST7LITE0x, ST7LITESx
Figure 12. PLL Output Frequency Timing
Diagram
LOCKED bit set
4/8 x
input
freq.
tSTAB
tLOCK
tSTARTUP
Bit 1 = MCO Main Clock Out enable
This bit is read/write by software and cleared by
hardware after a reset. This bit allows to enable
the MCO output clock.
0: MCO clock disabled, I/O port free for general
purpose I/O.
1: MCO clock enabled.
Bit 0 = SMS Slow Mode select
This bit is read/write by software and cleared by
hardware after a reset. This bit selects the input
clock fOSC or fOSC/32.
0: Normal mode (fCPU = fOSC
1: Slow mode (fCPU = fOSC/32)
t
When the PLL is started, after reset or wakeup
from Halt mode or AWUFH mode, it outputs the
clock after a delay of tSTARTUP.
When the PLL output signal reaches the operating
frequency, the LOCKED bit in the SICSCR register
is set. Full PLL accuracy (ACCPLL) is reached after
a stabilization time of tSTAB (see Figure 12 and
13.3.4 Internal RC Oscillator and PLL)
Refer to section 8.4.4 on page 37 for a description
of the LOCKED bit in the SICSR register.
7.3 REGISTER DESCRIPTION
MAIN CLOCK CONTROL/STATUS REGISTER
(MCCSR)
Read / Write
Reset Value: 0000 0000 (00h)
7
0
0
0
0
0
0
0 MCO SMS
RC CONTROL REGISTER (RCCR)
Read / Write
Reset Value: 1111 1111 (FFh)
7
0
CR7 CR6 CR5 CR4 CR3 CR2 CR1 CR0
Bits 7:0 = CR[7:0] RC Oscillator Frequency Ad-
justment Bits
These bits must be written immediately after reset
to adjust the RC oscillator frequency and to obtain
an accuracy of 1%. The application can store the
correct value for each voltage range in EEPROM
and write it to this register at start-up.
00h = maximum available frequency
FFh = lowest available frequency
Note: To tune the oscillator, write a series of differ-
ent values in the register until the correct frequen-
cy is reached. The fastest method is to use a di-
chotomy starting with 80h.
Bits 7:2 = Reserved, must be kept cleared.
Table 5. Clock Register Map and Reset Values
Address
(Hex.)
0038h
0039h
Register
Label
MCCSR
Reset Value
RCCR
Reset Value
7
0
CR7
1
6
0
CR6
1
5
0
CR5
1
4
0
CR4
1
3
0
CR3
1
2
0
CR2
1
1
MCO
0
CR1
1
0
SMS
0
CR0
1
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