PIC10F200/202/204/206
8.1 Comparator Configuration
The on-board comparator inputs, (GP0/CIN+, GP1/
CIN-), as well as the comparator output (GP2/COUT),
are steerable. The CMCON0, OPTION and TRIS
registers are used to steer these pins (see Figure 8-1).
If the Comparator mode is changed, the comparator
output level may not be valid for the specified mode
change delay shown in Table 12-1.
Note: The comparator can have an inverted
output (see Figure 8-1).
FIGURE 8-1:
BLOCK DIAGRAM OF THE COMPARATOR
CPREF
C+
+
C-
Band Gap Buffer
(0.6V)
-
CNREF
CMPON
POL
T0CKI/GP2/COUT
COUTEN
COUT (Register)
CWU
T0CKI
T0CKSEL
T0CKI Pin
QD
CWUF
S Read
CMCON
TABLE 8-1: TMR0 CLOCK SOURCE
FUNCTION MUXING
T0CS CMPT0CS COUTEN
Source
0
x
1
0
1
0
1
1
x
Internal Instruction
Cycle
0
CMPOUT
1
CMPOUT
0
CMPOUT
1
1
1
T0CKI
DS40001239F-page 32
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