PIC10F220-I(2006) View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC10F220-I Datasheet PDF : 78 Pages
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PIC10F220/222
TABLE 9-2: INSTRUCTION SET SUMMARY
Mnemonic,
Operands
Description
Cycles
12-Bit Opcode
MSb
LSb
Status
Affected
Notes
ADDWF
ANDWF
CLRF
CLRW
COMF
DECF
DECFSZ
INCF
INCFSZ
IORWF
MOVF
MOVWF
NOP
RLF
RRF
SUBWF
SWAPF
XORWF
BCF
BSF
BTFSC
BTFSS
ANDLW
CALL
CLRWDT
GOTO
IORLW
MOVLW
OPTION
RETLW
SLEEP
TRIS
XORLW
Note 1:
2:
3:
4:
f,d Add W and f
f,d AND W with f
f
Clear f
–
Clear W
f, d Complement f
f, d Decrement f
f, d Decrement f, Skip if 0
f, d Increment f
f, d Increment f, Skip if 0
f, d Inclusive OR W with f
f, d Move f
f
Move W to f
–
No Operation
f, d Rotate left f through Carry
f, d Rotate right f through Carry
f, d Subtract W from f
f, d Swap f
f, d Exclusive OR W with f
1 0001 11df ffff C,DC,Z 1,2,4
1 0001 01df ffff
Z
2,4
1 0000 011f ffff
Z
4
1 0000 0100 0000
Z
1 0010 01df ffff
Z
1 0000 11df ffff
Z
2,4
1(2) 0010 11df ffff None
2,4
1 0010 10df ffff
Z
2,4
1(2) 0011 11df ffff None
2,4
1 0001 00df ffff
Z
2,4
1 0010 00df ffff
Z
2,4
1 0000 001f ffff None 1,4
1 0000 0000 0000 None
1 0011 01df ffff
C
2,4
1 0011 00df ffff
C
2,4
1 0000 10df ffff C,DC,Z 1,2,4
1 0011 10df ffff None 2,4
1 0001 10df ffff
Z
2,4
BIT-ORIENTED FILE REGISTER OPERATIONS
f, b Bit Clear f
f, b Bit Set f
f, b Bit Test f, Skip if Clear
f, b Bit Test f, Skip if Set
1 0100 bbbf ffff None 2,4
1 0101 bbbf ffff None 2,4
1(2) 0110 bbbf ffff None
1(2) 0111 bbbf ffff None
LITERAL AND CONTROL OPERATIONS
k
AND literal with W
k
Call subroutine
k
Clear Watchdog Timer
k
Unconditional branch
k
Inclusive OR Literal with W
k
Move Literal to W
–
Load OPTION register
k
Return, place Literal in W
–
Go into standby mode
f
Load TRIS register
k
Exclusive OR Literal to W
1 1110 kkkk kkkk
Z
2 1001 kkkk kkkk None
1
1 0000 0000 0100 TO, PD
2 101k kkkk kkkk None
1 1101 kkkk kkkk
Z
1 1100 kkkk kkkk None
1 0000 0000 0010 None
2 1000 kkkk kkkk None
1 0000 0000 0011 TO, PD
1 0000 0000 0fff None
3
1 1111 kkkk kkkk
Z
The 9th bit of the program counter will be forced to a ‘0’ by any instruction that writes to the PC except for
GOTO. See Section 4.7 “Program Counter”.
When an I/O register is modified as a function of itself (e.g., MOVF PORTB, 1), the value used will be that
value present on the pins themselves. For example, if the data latch is ‘1’ for a pin configured as input and
is driven low by an external device, the data will be written back with a ‘0’.
The instruction TRIS f, where f = 6 causes the contents of the W register to be written to the tri-state
latches of PORTB. A ‘1’ forces the pin to a high-impedance state and disables the output buffers.
If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be
cleared (if assigned to TMR0).
DS41270B-page 44
Preliminary
© 2006 Microchip Technology Inc.
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