PIC10F220IP(2006) View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC10F220IP Datasheet PDF : 78 Pages
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PIC10F220/222
IORWF
Inclusive OR W with f
Syntax:
[ label ] IORWF f,d
Operands:
0 ≤ f ≤ 31
d ∈ [0,1]
Operation:
(W).OR. (f) → (dest)
Status Affected: Z
Description:
Inclusive OR the W register with
register ‘f’. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is ‘1’,
the result is placed back in register
‘f’.
MOVF
Move f
Syntax:
[ label ] MOVF f,d
Operands:
0 ≤ f ≤ 31
d ∈ [0,1]
Operation:
(f) → (dest)
Status Affected: Z
Description:
The contents of register ‘f’ are
moved to destination ‘d’. If ‘d’ is ‘0’,
destination is the W register. If ‘d’
is ‘1’, the destination is file register
‘f’. ‘d’ = 1 is useful as a test of a file
register, since status flag Z is
affected.
MOVLW
Move Literal to W
Syntax:
[ label ] MOVLW k
Operands:
0 ≤ k ≤ 255
Operation:
k → (W)
Status Affected: None
Description:
The eight-bit literal ‘k’ is loaded
into the W register. The “don’t
cares” will assembled as ‘0’s.
MOVWF
Move W to f
Syntax:
[ label ] MOVWF f
Operands:
0 ≤ f ≤ 31
Operation:
(W) → (f)
Status Affected: None
Description:
Move data from the W register to
register ‘f’.
NOP
No Operation
Syntax:
[ label ] NOP
Operands:
None
Operation:
No operation
Status Affected: None
Description:
No operation.
OPTION
Syntax:
Operands:
Operation:
Status Affected:
Description:
Load OPTION Register
[ label ] OPTION
None
(W) → OPTION
None
The content of the W register is
loaded into the OPTION register.
DS41270B-page 48
Preliminary
© 2006 Microchip Technology Inc.
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