PIC12F617T-EMD View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC12F617T-EMD

8-Pin Flash-Based, 8-Bit CMOS Microcontrollers

Microchip Technology 

PIC12F609/615/617/12HV609/615

FIGURE 12-8:

INT PIN INTERRUPT TIMING

OSC1

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

CLKOUT (3)

(4)

INT pin

INTF flag

(1)

(INTCON reg.)

(1)

(5)

GIE bit

(INTCON reg.)

Interrupt Latency (2)

INSTRUCTION FLOW

PC

PC

Instruction

Fetched

Inst (PC)

PC + 1

Inst (PC + 1)

PC + 1

—

0004h

Inst (0004h)

0005h

Inst (0005h)

Instruction

Executed

Inst (PC – 1)

Inst (PC)

Dummy Cycle Dummy Cycle

Inst (0004h)

Note 1: INTF flag is sampled here (every Q1).

2: Asynchronous interrupt latency = 3-4 TCY. Synchronous latency = 3 TCY, where TCY = instruction cycle time. Latency

is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.

3: CLKOUT is available only in INTOSC and RC Oscillator modes.

4: For minimum width of INT pulse, refer to AC specifications in Section 16.0 “Electrical Specifications”.

5: INTF is enabled to be set any time during the Q4-Q1 cycles.

TABLE 12-7: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS

Name Bit 7 Bit 6

Bit 5 Bit 4 Bit 3 Bit 2 Bit 1

Bit 0

Value on

POR, BOR

Value on

all other

Resets

INTCON GIE PEIE

T0IE

INTE GPIE T0IF

INTF

GPIF 0000 0000 0000 0000

IOC

PIR1

PIE1

—

—

IOC5 IOC4 IOC3 IOC2 IOC1

IOC0 --00 0000 --00 0000

— ADIF(1) CCP1IF(1) —

CMIF

— TMR2IF(1) TMR1IF -00- 0-00 -000 0-00

— ADIE(1) CCP1IE(1) —

CMIE

— TMR2IE(1) TMR1IE -00- 0-00 -000 0-00

Legend: x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition.

Shaded cells are not used by the interrupt module.

Note 1: PIC12F615/617/HV615 only.

DS41302D-page 120

 2010 Microchip Technology Inc.

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