PIC12F609/615/617/12HV609/615
TABLE 5-1: SUMMARY OF REGISTERS ASSOCIATED WITH GPIO
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
ANSEL
—
ADCS2(1) ADCS1(1) ADCS0(1) ANS3
ANS2(1)
ANS1
ANS0
-000 1111
CMCON0
CMON COUT CMOE CMPOL
—
CMR
—
CMCH 0000 -0-0
INTCON
GIE
PEIE
T0IE
INTE
GPIE
T0IF
INTF
GPIF
0000 0000
IOC
—
—
IOC5
IOC4
IOC3
IOC2
IOC1
IOC0
--00 0000
OPTION_REG
GPPU INTEDG T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
GPIO
—
—
GP5
GP4
GP3
GP2
GP1
GP0
--xx xxxx
TRISIO
—
—
TRISIO5 TRISIO4 TRISIO3 TRISIO2 TRISIO1 TRISIO0 --11 1111
WPU
—
—
WPU5 WPU4
WPU3
WPU2 WPU1 WPU0 --11 1111
T1CON
CCP1CON(1)
APFCON(1)
T1GINV
P1M
—
TMR1GE TICKPS1 T1CKPS0 T1OSCEN
—
DC1B1 DC1B0 CCP1M3
—
—
T1GSEL
—
T1SYNC
CCP1M2
—
TMR1CS
CCP1M1
P1BSEL
TMR1ON
CCP1M0
P1ASEL
0000 0000
0-00 0000
---0 --00
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by GPIO.
Note 1: PIC12F615/617/HV615 only.
Value on
all other
Resets
-000 1111
0000 -0-0
0000 0000
--00 0000
1111 1111
--u0 u000
--11 1111
--11 -111
uuuu uuuu
0-00 0000
---0 --00
DS41302D-page 52
2010 Microchip Technology Inc.