PIC12F609/615/617/12HV609/615
REGISTER 8-1: T2CON: TIMER 2 CONTROL REGISTER
U-0
—
bit 7
R/W-0
TOUTPS3
R/W-0
TOUTPS2
R/W-0
TOUTPS1
R/W-0
TOUTPS0
R/W-0
TMR2ON
R/W-0
T2CKPS1
R/W-0
T2CKPS0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6-3
bit 2
bit 1-0
Unimplemented: Read as ‘0’
TOUTPS<3:0>: Timer2 Output Postscaler Select bits
0000 =1:1 Postscaler
0001 =1:2 Postscaler
0010 =1:3 Postscaler
0011 =1:4 Postscaler
0100 =1:5 Postscaler
0101 =1:6 Postscaler
0110 =1:7 Postscaler
0111 =1:8 Postscaler
1000 =1:9 Postscaler
1001 =1:10 Postscaler
1010 =1:11 Postscaler
1011 =1:12 Postscaler
1100 =1:13 Postscaler
1101 =1:14 Postscaler
1110 =1:15 Postscaler
1111 =1:16 Postscaler
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
T2CKPS<1:0>: Timer2 Clock Prescale Select bits
00 =Prescaler is 1
01 =Prescaler is 4
1x =Prescaler is 16
TABLE 8-1: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER2
Name Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
INTCON
PIE1
PIR1
PR2(1)
TMR2(1)
T2CON(1)
GIE
PEIE
T0IE
INTE
—
ADIE(1) CCP1IE(1)
—
—
ADIF(1) CCP1IF(1)
—
Timer2 Module Period Register
Holding Register for the 8-bit TMR2 Register
— TOUTPS3 TOUTPS2 TOUTPS1
GPIE
CMIE
CMIF
TOUTPS0
T0IF
—
—
TMR2ON
INTF
TMR2IE(1)
TMR2IF(1)
T2CKPS1
GPIF
TMR1IE
TMR1IF
T2CKPS0
0000 0000
-00- 0-00
-00- 0-00
1111 1111
0000 0000
-000 0000
Legend: x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used for Timer2 module.
Note 1: For PIC12F615/617/HV615 only.
Value on
all other
Resets
0000 0000
-00- 0-00
-00- 0-00
1111 1111
0000 0000
-000 0000
DS41302D-page 66
2010 Microchip Technology Inc.