PIC16CR67-10 View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16CR67-10 Datasheet PDF : 336 Pages
| |||
PIC16C6X
Applicable Devices 61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
FIGURE 21-12: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
121
121
120
122
Note: Refer to Figure 21-1 for load conditions
TABLE 21-11: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Parameter Sym
No.
Characteristic
Min Typ† Max Units Conditions
120* TckH2dtV SYNC XMIT (MASTER & SLAVE) PIC16C63/65A
—
—
80
ns
Clock high to data out valid
PIC16LC63/65A —
— 100
ns
121* Tckrf
Clock out rise time and fall time PIC16C63/65A
—
—
45
ns
(Master Mode)
PIC16LC63/65A —
—
50
ns
122* Tdtrf
Data out rise time and fall time PIC16C63/65A
—
—
45
ns
PIC16LC63/65A —
—
50
ns
* These parameters are characterized but not tested.
†: Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
FIGURE 21-13: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
125
126
Note: Refer to Figure 21-1 for load conditions
TABLE 21-12: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Parameter Sym
No.
Characteristic
Min
Typ† Max Units Conditions
125*
TdtV2ckL SYNC RCV (MASTER & SLAVE)
Data setup before CK ↓ (DT setup time)
15
—
—
ns
126*
TckL2dtl Data hold after CK ↓ (DT hold time)
15
—
—
ns
* These parameters are characterized but not tested.
†: Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
DS30234D-page 246
© 1997 Microchip Technology Inc.
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