PIC16LC72AT-20ISO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16LC72AT-20ISO Datasheet PDF : 120 Pages
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PIC16C62B/72A
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Inclusive OR Literal with W
[ label ] IORLW k
0 ≤ k ≤ 255
(W) .OR. k → (W)
Z
The contents of the W register is
OR’ed with the eight bit literal 'k'. The
result is placed in the W register.
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Move Literal to W
[ label ] MOVLW k
0 ≤ k ≤ 255
k → (W)
None
The eight bit literal 'k' is loaded into W
register. The don’t cares will assem-
ble as 0’s.
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Inclusive OR W with f
[ label ] IORWF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(W) .OR. (f) → (destination)
Z
Inclusive OR the W register with regis-
ter 'f'. If 'd' is 0, the result is placed in
the W register. If 'd' is 1, the result is
placed back in register 'f'.
MOVWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Move W to f
[ label ] MOVWF f
0 ≤ f ≤ 127
(W) → (f)
None
Move data from W register to register
'f'.
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Move f
[ label ] MOVF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f) → (destination)
Z
The contents of register f is moved to
a destination dependant upon the sta-
tus of d. If d = 0, destination is W reg-
ister. If d = 1, the destination is file
register f itself. d = 1 is useful to test a
file register since status flag Z is
affected.
NOP
Syntax:
Operands:
Operation:
Status Affected:
Description:
No Operation
[ label ] NOP
None
No operation
None
No operation.
DS35008B-page 72
Preliminary
© 1999 Microchip Technology Inc.
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