PIC16LC72AT-20ISO View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16LC72AT-20ISO Datasheet PDF : 120 Pages
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RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Return from Interrupt
[ label ] RETFIE
None
TOS → PC,
1 → GIE
None
PIC16C62B/72A
RLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Rotate Left f through Carry
[ label ] RLF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
See description below
C
The contents of register ’f’ are rotated
one bit to the left through the Carry
Flag. If ’d’ is 0, the result is placed in
the W register. If ’d’ is 1, the result is
stored back in register ’f’.
C
Register f
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Return with Literal in W
[ label ] RETLW k
0 ≤ k ≤ 255
k → (W);
TOS → PC
None
The W register is loaded with the eight
bit literal ’k’. The program counter is
loaded from the top of the stack (the
return address). This is a two cycle
instruction.
RRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Rotate Right f through Carry
[ label ] RRF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
See description below
C
The contents of register ’f’ are rotated
one bit to the right through the Carry
Flag. If ’d’ is 0, the result is placed in
the W register. If ’d’ is 1, the result is
placed back in register ’f’.
C
Register f
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
Return from Subroutine
[ label ] RETURN
None
TOS → PC
None
Return from subroutine. The stack is
POPed and the top of the stack (TOS)
is loaded into the program counter.
This is a two cycle instruction.
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
[ label ] SLEEP
None
00h → WDT,
0 → WDT prescaler,
1 → TO,
0 → PD
TO, PD
The power-down status bit, PD is
cleared. Time-out status bit, TO is
set. Watchdog Timer and its pres-
caler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
See Section 10.13 for more details.
© 1999 Microchip Technology Inc.
Preliminary
DS35008B-page 73
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