PIC16LC8X-04 View Datasheet(PDF) - Microchip Technology
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PIC16LC8X-04 Datasheet PDF : 117 Pages
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5.0 I/O PORTS
The PIC16C8X family has two ports, PORTA and
PORTB. Some port pins are multiplexed with an
alternate function for other features on the device.
5.1 PORTA and TRISA Registers
PORTA is a 5-bit wide latch. RA4 is a Schmitt Trigger
input and an open drain output. All other RA port pins
have TTL input levels and full CMOS output drivers. All
pins have data direction bits (TRIS registers) which can
configure these pins as output or input.
A '1' on any bit in the TRISA register puts the
corresponding output driver in a hi-impedance mode. A
'0' on any bit in the TRISA register puts the contents of
the output latch on the selected pin(s).
Reading the PORTA register reads the status of the pins
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. So a write
to a port implies that the port pins are first read, then this
value is modified and written to the port data latch.
The RA4 pin is multiplexed with the TMR0 clock input.
FIGURE 5-1:
Data
bus
D
BLOCK DIAGRAM OF PINS
RA3:RA0
Q
WR
VDD
Port
CK Q
P
Data Latch
D
Q
N
I/O pin
WR
VSS
TRIS
CK Q
TRIS Latch
TTL
input
buffer
RD TRIS
Q
D
EN
RD PORT
Note: I/O pins have protection diodes to VDD and VSS.
PIC16C8X
EXAMPLE 5-1: INITIALIZING PORTA
CLRF
BSF
MOVLW
MOVWF
PORTA
STATUS, RP0
0x0F
TRISA
; Initialize PORTA by
; setting output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA4 as outputs
; TRISA<7:5> are always
; read as '0'.
FIGURE 5-2: BLOCK DIAGRAM OF PIN RA4
Data
bus
WR
PORT
DQ
CK Q
Data Latch
WR
TRIS
DQ
CK Q
TRIS Latch
N
RA4 pin
VSS
Schmitt
Trigger
input
buffer
RD PORT
RD TRIS
Q
D
EENN
TMR0 clock input
Note: I/O pin has protection diodes to VSS only.
Note:
For the PIC16C84 Only:
For crystal oscillator configurations
operating below 500 kHz, the device may
generate a spurious internal Q-clock when
PORTA<0> switches state. This does not
occur with an external clock in RC mode.
To avoid this, the RA0 pin should be kept
static, i.e. in input/output mode, pin RA0
should not be toggled.
© 1995 Microchip Technology Inc.
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DS30081F-page 21
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