PIC16C8X
FIGURE 5-5:
RBPU(2)
Data bus
WR Port
WR TRIS
BLOCK DIAGRAM OF PINS
RB3:RB0 (ALL OTHER
PIC16C8X DEVICES)
VDD
Data Latch
DQ
P
weak
pull-up
CK
TRIS Latch
DQ
CK
TTL
Input
Buffer
I/O
pin(1)
EXAMPLE 5-2: INITIALIZING PORTB
CLRF
BSF
MOVLW
MOVWF
PORTB
STATUS, RP0
0xCF
TRISB
; Initialize PORTB by
; setting output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
RD TRIS
RD Port
QD
EN
RB0/INT
Schmitt Trigger
Buffer
RD Port
Note 1: I/O pins have diode protection to VDD and VSS.
2: TRISB = '1' enables weak pull-up if RBPU = '0'
(OPTION<7>).
TABLE 5-3: PORTB FUNCTIONS
Name
Bit Buffer Type
I/O Consistency Function
RB0/INT
bit0
TTL/ST(1) Input/output pin or external interrupt input. Internal software
programmable weak pull-up.
RB1
bit1
TTL
Input/output pin. Internal software programmable weak pull-up.
RB2
bit2
TTL
Input/output pin. Internal software programmable weak pull-up.
RB3
bit3
TTL
Input/output pin. Internal software programmable weak pull-up.
RB4
bit4
TTL
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
RB5
bit5
TTL
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
RB6
bit6
TTL/ST(2) Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming clock.
RB7
bit7
TTL/ST(2) Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming data.
Legend: TTL = TTL input, ST = Schmitt Trigger.
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt, except for the PIC16C84,
which remains TTL.
2: This buffer is a Schmitt Trigger input when used in serial programming mode.
TABLE 5-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
06h
PORTB
86h
TRISB
RB7
RB6
RB5
TRISB7 TRISB6 TRISB5
RB4
TRISB4
RB3
RB2
TRISB3 TRISB2
81h
OPTION
RBPU INTEDG T0CS
T0SE
PSA
PS2
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB.
Bit 1
Bit 0
RB1 RB0/INT
TRISB1 TRISB0
PS1
PS0
Value on
Power-on
Reset
xxxx xxxx
1111 1111
1111 1111
Value on all
other resets
uuuu uuuu
1111 1111
1111 1111
DS30081F-page 24
© 1995 Microchip Technology Inc.