PIC16C8X
Applicable Devices 83 R83 84 84A R84
FIGURE 11-4: CLKOUT AND I/O TIMING
Q4
Q1
OSC1
10
CLKOUT
I/O Pin
(input)
13
14
17
Q2
22
23
19 18
15
Q3
11
12
16
I/O Pin
(output)
old value
new value
20, 21
Note: All tests must be done with specified capacitive loads (Figure 11-2) 50 pF on I/O pins and CLKOUT.
TABLE 11-4: CLKOUT AND I/O TIMING REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min
Typ†
Max
Units Conditions
10
TosH2ckL OSC1↑ to CLKOUT↓ PIC16C84
—
15
30 *
ns
Note 1
10A
PIC16LC84
—
15
120 *
ns
Note 1
11
TosH2ckH OSC1↑ to CLKOUT↑ PIC16C84
—
15
30 *
ns
Note 1
11A
PIC16LC84
—
15
120 *
ns
Note 1
12
TckR
CLKOUT rise time
PIC16C84
—
15
30 *
ns
Note 1
12A
PIC16LC84
—
15
100 *
ns
Note 1
13
TckF
CLKOUT fall time
PIC16C84
—
15
30 *
ns
Note 1
13A
PIC16LC84
—
15
100 *
ns
Note 1
14
TckL2ioV CLKOUT ↓ to Port out valid
—
— 0.5TCY +20 * ns
Note 1
15
TioV2ckH Port in valid before PIC16C84
0.30TCY + 30 * —
—
ns
Note 1
CLKOUT ↑
PIC16LC84 0.30TCY + 80 * —
—
ns
Note 1
16
TckH2ioI Port in hold after CLKOUT ↑
0*
—
—
ns
Note 1
17
TosH2ioV OSC1↑ (Q1 cycle) to PIC16C84
—
—
125 *
ns
Port out valid
PIC16LC84
—
—
250 *
ns
18
TosH2ioI OSC1↑ (Q2 cycle) to Port input invalid
TBD
—
—
ns
(I/O in hold time)
19
TioV2osH Port input valid to OSC1↑
(I/O in setup time)
TBD
—
—
ns
20
TioR
Port output rise time PIC16C84
—
10
25 *
ns
20A
PIC16LC84
—
10
60 *
ns
21
TioF
Port output fall time PIC16C84
—
10
25 *
ns
21A
PIC16LC84
—
10
60 *
ns
22
Tinp
INT pin high
PIC16C84
20 *
—
—
ns
22A
or low time
PIC16LC84
55 *
—
—
ns
23
Trbp
RB7:RB4 change INT PIC16C84
20 *
—
—
ns
23A
high or low time
PIC16LC84
55 *
—
—
ns
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5.0V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Measurements are taken in RC Mode where CLKOUT output is 4 x TOSC.
DS30081F-page 78
© 1995 Microchip Technology Inc.