PIC16CE624T-04SS View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16CE624T-04SS

OTP 8-Bit CMOS MCU with EEPROM Data Memory

Microchip Technology 

PIC16CE62X

4.4 Indirect Addressing, INDF and FSR

Registers

The INDF register is not a physical register. Addressing

the INDF register will cause indirect addressing.

Indirect addressing is possible by using the INDF reg-

ister. Any instruction using the INDF register actually

accesses data pointed to by the File Select Register

(FSR). Reading INDF itself indirectly will produce 00h.

Writing to the INDF register indirectly results in a

no-operation (although status bits may be affected). An

effective 9-bit address is obtained by concatenating the

8-bit FSR register and the IRP bit (STATUS<7>), as

shown in Figure 4-7. However, IRP is not used in the

PIC16CE62X.

A simple program to clear RAM location 20h-2Fh using

indirect addressing is shown in Example 4-1.

EXAMPLE 4-1: INDIRECT ADDRESSING

NEXT

movlw

movwf

clrf

incf

btfss

goto

CONTINUE:

0x20

FSR

INDF

FSR

FSR,4

NEXT

;initialize pointer

;to RAM

;clear INDF register

;inc pointer

;all done?

;no clear next

;yes continue

FIGURE 4-7: DIRECT/INDIRECT ADDRESSING PIC16CE62X

Direct Addressing

RP1 RP0(1) 6

from opcode

0

Indirect Addressing

IRP(1) 7

FSR Register 0

bank select location select

00

01

00h

bank select

10

11

180h

location select

Data

Memory

not used

7Fh

Bank 0

Bank 1 Bank 2

1FFh

Bank 3

For memory map detail see Figure 4-4 and Figure 4-5.

Note 1: The RP1 and IRP bits are reserved; always maintain these bits clear.

© 1999 Microchip Technology Inc.

DS40182C-page 21

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