PIC16(L)F1824/1828
TABLE 22-1: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER2/4/6
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
INTCON
GIE
PEIE TMR0IE INTE
IOCIE TMR0IF INTF
IOCIF
93
PIE1
TMR1GIE ADIE
RCIE
TXIE SSP1IE CCP1IE TMR2IE TMR1IE
94
PIE3
—
—
CCP4IE CCP3IE TMR6IE
—
TMR4IE
—
96
PIR1
TMR1GIF ADIF
RCIF
TXIF
SSP1IF CCP1IF TMR2IF TMR1IF
97
PIR3
—
—
CCP4IF CCP3IF TMR6IF
—
TMR4IF
—
99
PR2
Timer2 Module Period Register
PR4
Timer4 Module Period Register
201*
201*
PR6
Timer6 Module Period Register
201*
T2CON
—
T4CON
—
TOUTPS<3:0>
T4OUTPS<3:0>
TMR2ON T2CKPS1 T2CKPS0 203
TMR4ON T4CKPS1 T4CKPS0 203
T6CON
—
T6OUTPS<3:0>
TMR6ON T6CKPS1 T6CKPS0 203
TMR2
TMR4
TMR6
Holding Register for the 8-bit TMR2 Register
Holding Register for the 8-bit TMR4 Register(1)
Holding Register for the 8-bit TMR6 Register(1)
201*
201*
201*
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for Timer2 module.
* Page provides register information.
DS41419B-page 204
Preliminary
2010 Microchip Technology Inc.