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PIC16F1828T-I/SL View Datasheet(PDF) - Microchip Technology

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PIC16F1828T-I/SL Datasheet PDF : 419 Pages
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PIC16(L)F1824/1828
23.0 DATA SIGNAL MODULATOR
The Data Signal Modulator (DSM) is a peripheral which
allows the user to mix a data stream, also known as a
modulator signal, with a carrier signal to produce a
modulated output.
Both the carrier and the modulator signals are supplied
to the DSM module either internally, from the output of
a peripheral, or externally through an input pin.
The modulated output signal is generated by perform-
ing a logical “AND” operation of both the carrier and
modulator signals and then provided to the MDOUT pin.
The carrier signal is comprised of two distinct and sep-
arate signals. A carrier high (CARH) signal and a car-
rier low (CARL) signal. During the time in which the
modulator (MOD) signal is in a logic high state, the
DSM mixes the carrier high signal with the modulator
signal. When the modulator signal is in a logic low
state, the DSM mixes the carrier low signal with the
modulator signal.
Using this method, the DSM can generate the following
types of key modulation schemes:
• Frequency-Shift Keying (FSK)
• Phase-Shift Keying (PSK)
• On-Off Keying (OOK)
Additionally, the following features are provided within
the DSM module:
• Carrier Synchronization
• Carrier Source Polarity Select
• Carrier Source Pin Disable
• Programmable Modulator Data
• Modulator Source Pin Disable
• Modulated Output Polarity Select
• Slew Rate Control
Figure 23-1 shows a Simplified Block Diagram of the
Data Signal Modulator peripheral.
FIGURE 23-1:
SIMPLIFIED BLOCK DIAGRAM OF THE DATA SIGNAL MODULATOR
MDCH<3:0>
VSS
MDCIN1
MDCIN2
CLKR
CCP1
CCP2
CCP3
CCP4
Reserved
No Channel
Selected
0000
0001
0010
0011
0100
0101 CARH
0110
0111
1000
*
*
1111
MDMS<3:0>
MDBIT
MDMIN
CCP1
CCP2
CCP3
CCP4
Comparator C1
Comparator C2
MSSP1 SDO1
MSSP2 SDO2
EUSART
Reserved
No Channel
Selected
0000
0001
0010
0011
0100
0101
0110 MOD
0111
1000
1001
1010
0011
*
*
1111
MDEN
EN
MDCHPOL
Data Signal
Modulator
D
SYNC
Q
1
0
MDCHSYNC
MDOPOL MDOE
MDOUT
MDCL<3:0>
VSS
MDCIN1
MDCIN2
CLKR
CCP1
CCP2
CCP3
CCP4
Reserved
No Channel
Selected
0000
0001
0010
0011
0100
0101 CARL
0110
0111
1000
*
*
1111
MDCLPOL
D
SYNC
Q
1
0
MDCLSYNC
2010 Microchip Technology Inc.
Preliminary
DS41419B-page 205

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