PIC16(L)F1824/1828
The I2C interface supports the following modes and
features:
• Master mode
• Slave mode
• Byte NACKing (Slave mode)
• Limited multi-master support
• 7-bit and 10-bit addressing
• Start and Stop interrupts
• Interrupt masking
• Clock stretching
• Bus collision detection
• General call address matching
• Address masking
• Address Hold and Data Hold modes
• Selectable SDA hold times
Figure 25-2 is a block diagram of the I2C interface mod-
ule in Master mode. Figure 25-3 is a diagram of the I2C
interface module in Slave mode.
FIGURE 25-2:
MSSP1 BLOCK DIAGRAM (I2C™ MASTER MODE)
SDA
SCL
SDA in
Read
Internal
data bus
Write
SSP1BUF
SSP1SR
MSb
Shift
Clock
LSb
Start bit, Stop bit,
Acknowledge
Generate (SSP1CON2)
[SSPM 3:0]
Baud rate
generator
(SSP1ADD)
SCL in
Bus Collision
Start bit detect,
Stop bit detect
Write collision detect
Clock arbitration
State counter for
end of XMIT/RCV
Address Match detect
Set/Reset: S, P, SSP1STAT, WCOL, SSPOV
Reset SEN, PEN (SSP1CON2)
Set SSP1IF, BCL1IF
DS41419B-page 244
Preliminary
2010 Microchip Technology Inc.