PIC16F1828T-I/SL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F1828T-I/SL

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC16(L)F1824/1828

25.2.3 SPI MASTER MODE

The master can initiate the data transfer at any time

because it controls the SCK line. The master

determines when the slave (Processor 2, Figure 25-5)

is to broadcast data by the software protocol.

In Master mode, the data is transmitted/received as

soon as the SSP1BUF register is written to. If the SPI

is only going to receive, the SDO output could be dis-

abled (programmed as an input). The SSP1SR register

will continue to shift in the signal present on the SDI pin

at the programmed clock rate. As each byte is

received, it will be loaded into the SSP1BUF register as

if a normal received byte (interrupts and Status bits

appropriately set).

The clock polarity is selected by appropriately

programming the CKP bit of the SSP1CON1 register

and the CKE bit of the SSP1STAT register. This then,

would give waveforms for SPI communication as

shown in Figure 25-6, Figure 25-8 and Figure 25-9,

where the MSB is transmitted first. In Master mode, the

SPI clock rate (bit rate) is user programmable to be one

of the following:

• FOSC/4 (or TCY)

• FOSC/16 (or 4 * TCY)

• FOSC/64 (or 16 * TCY)

• Timer2 output/2

• Fosc/(4 * (SSP1ADD + 1))

Figure 25-6 shows the waveforms for Master mode.

When the CKE bit is set, the SDO data is valid before

there is a clock edge on SCK. The change of the input

sample is shown based on the state of the SMP bit. The

time when the SSP1BUF is loaded with the received

data is shown.

FIGURE 25-6:

Write to

SSP1BUF

SCK

(CKP = 0

CKE = 0)

SCK

(CKP = 1

CKE = 0)

SCK

(CKP = 0

CKE = 1)

SCK

(CKP = 1

CKE = 1)

SDO

(CKE = 0)

SDO

(CKE = 1)

SDI

(SMP = 0)

Input

Sample

(SMP = 0)

SDI

(SMP = 1)

Input

Sample

(SMP = 1)

SSP1IF

SSP1SR to

SSP1BUF

SPI MODE WAVEFORM (MASTER MODE)

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

bit 7

bit 0

bit 7

bit 0

4 Clock

Modes

DS41419B-page 250

Preliminary

 2010 Microchip Technology Inc.

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