PIC16F688T-I/ST View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F688T-I/ST

14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC16F688

10.3.1 AUTO-BAUD DETECT

The EUSART module supports automatic detection

and calibration of the baud rate.

In the Auto-Baud Detect (ABD) mode, the clock to the

BRG is reversed. Rather than the BRG clocking the

incoming RX signal, the RX signal is timing the BRG.

The Baud Rate Generator is used to time the period of

a received 55h (ASCII “U”) which is the Sync character

for the LIN bus. The unique feature of this character is

that it has five rising edges including the Stop bit edge.

Setting the ABDEN bit of the BAUDCTL register starts

the auto-boot sequence (Figure 10-6). While the ABD

sequence takes place, the EUSART state machine is

held in Idle. On the first rising edge of the receive line,

after the Start bit, the SPBRG begins counting up using

the BRG counter clock as shown in Table 10-6. The

fifth rising edge will occur on the RX pin at the end of

the eighth bit period. At that time, an accumulated

value totaling the proper BRG period is left in

SPBRGH, SPBRG register pair, the ABDEN bit is

automatically cleared and the RCIF interrupt flag is set.

The value in the RCREG needs to be read to clear the

RCIF interrupt. RCREG content should be discarded.

When calibrating for modes that do not use the

SPBRGH register the user can verify that the SPBRG

register did not overflow by checking for 00h in the

SPBRGH register.

The BRG auto-baud clock is determined by the BRG16

and BRGH bits as shown in Table 10-6. During ABD,

both the SPBRGH and SPBRG registers are used as a

16-bit counter, independent of the BRG16 bit setting.

While calibrating the baud rate period, the SPBRGH

and SPBRG registers are clocked at 1/8th the BRG

base clock rate. The resulting byte measurement is the

average bit time when clocked at full speed.

Note 1: If the WUE bit is set with the ABDEN bit,

auto-baud detection will occur on the byte

following the Break character (see

Section 10.3.2 “Auto-Wake-up on

Break”).

2: It is up to the user to determine that the

incoming character baud rate is within the

range of the selected BRG clock source.

Some combinations of oscillator frequency

and EUSART baud rates are not possible

due to bit error rates. Overall system timing

and communication baud rates must be

taken into consideration when using the

Auto-Baud Detect feature.

3: During the auto-baud process, the auto-

baud counter starts counting at 1. Upon

completion of the auto-baud sequence, to

achieve maximum accuracy, subtract 1

from the SPBRGH:SPBRG register pair.

TABLE 10-6: BRG COUNTER CLOCK RATES

BRG16 BRGH

BRG Base

Clock

BRG ABD

Clock

0

0

1

1

Note:

0

FOSC/64

FOSC/512

1

FOSC/16

FOSC/128

0

FOSC/16

FOSC/128

1

FOSC/4

FOSC/32

During the ABD sequence, SPBRG and

SPBRGH registers are both used as a 16-bit

counter, independent of BRG16 setting.

FIGURE 10-6:

AUTOMATIC BAUD RATE CALCULATION

BRG Value

RX pin

XXXXh

0000h

Start

Edge #1

bit 0 bit 1

Edge #2

bit 2 bit 3

Edge #3

bit 4 bit 5

Edge #4

bit 6 bit 7

001Ch

Edge #5

Stop bit

BRG Clock

Set by User

ABDEN bit

RCIDL

RCIF bit

(Interrupt)

Read

RCREG

SPBRG

XXh

SPBRGH

XXh

Note 1: The ABD sequence requires the EUSART module to be configured in Asynchronous mode.

Auto Cleared

1Ch

00h

© 2007 Microchip Technology Inc.

DS41203D-page 99

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